Multi-Domain FeFET-Based Pixel for In-Sensor Multiply-and-Accumulate Operations
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arXiv
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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866916814408122368 |
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| author | Udoy, Md Rahatul Islam Li, Wantong Ni, Kai Aziz, Ahmedullah |
| author_facet | Udoy, Md Rahatul Islam Li, Wantong Ni, Kai Aziz, Ahmedullah |
| contents | This paper presents an FeFET-based active pixel sensor that performs in-sensor multiply-and-accumulate (MAC) operations by leveraging the multi-domain polarization states of ferroelectric layers. The proposed design integrates a programmable FeFET into a 3-transistor pixel circuit, where the FeFET's non-volatile conductance encodes the weight, and the photodiode voltage drop encodes the input. Their interaction generates an output current proportional to the product, enabling in-pixel analog multiplication. Accumulation is achieved by summing output currents along shared column lines, realizing full MAC functionality within the image sensor array. Extensive HSPICE simulations, using 45 nm CMOS models, validate the operation and confirm the scalability of the design. This compact and power-efficient architecture minimizes data movement, making it ideal for real-time edge computing, neuromorphic vision, and secure sensing applications. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_22596 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Multi-Domain FeFET-Based Pixel for In-Sensor Multiply-and-Accumulate Operations Udoy, Md Rahatul Islam Li, Wantong Ni, Kai Aziz, Ahmedullah Image and Video Processing This paper presents an FeFET-based active pixel sensor that performs in-sensor multiply-and-accumulate (MAC) operations by leveraging the multi-domain polarization states of ferroelectric layers. The proposed design integrates a programmable FeFET into a 3-transistor pixel circuit, where the FeFET's non-volatile conductance encodes the weight, and the photodiode voltage drop encodes the input. Their interaction generates an output current proportional to the product, enabling in-pixel analog multiplication. Accumulation is achieved by summing output currents along shared column lines, realizing full MAC functionality within the image sensor array. Extensive HSPICE simulations, using 45 nm CMOS models, validate the operation and confirm the scalability of the design. This compact and power-efficient architecture minimizes data movement, making it ideal for real-time edge computing, neuromorphic vision, and secure sensing applications. |
| title | Multi-Domain FeFET-Based Pixel for In-Sensor Multiply-and-Accumulate Operations |
| topic | Image and Video Processing |
| url | https://arxiv.org/abs/2506.22596 |