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| Main Authors: | , , , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2507.02128 |
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| _version_ | 1866916911692906496 |
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| author | Pan, Jingyu Jacobson, Isaac Zhao, Zheng Chen, Tung-Chieh Zhou, Guanglei Chang, Chen-Chia Rashingkar, Vineet Chen, Yiran |
| author_facet | Pan, Jingyu Jacobson, Isaac Zhao, Zheng Chen, Tung-Chieh Zhou, Guanglei Chang, Chen-Chia Rashingkar, Vineet Chen, Yiran |
| contents | Modern very large-scale integration (VLSI) design requires the implementation of integrated circuits using electronic design automation (EDA) tools. Due to the complexity of EDA algorithms, the vast parameter space poses a huge challenge to chip design optimization, as the combination of even moderate numbers of parameters creates an enormous solution space to explore. Manual parameter selection remains industrial practice despite being excessively laborious and limited by expert experience. To address this issue, we present CROP, the first large language model (LLM)-powered automatic VLSI design flow tuning framework. Our approach includes: (1) a scalable methodology for transforming RTL source code into dense vector representations, (2) an embedding-based retrieval system for matching designs with semantically similar circuits, and (3) a retrieval-augmented generation (RAG)-enhanced LLM-guided parameter search system that constrains the search process with prior knowledge from similar designs. Experiment results demonstrate CROP's ability to achieve superior quality-of-results (QoR) with fewer iterations than existing approaches on industrial designs, including a 9.9% reduction in power consumption. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_02128 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs Pan, Jingyu Jacobson, Isaac Zhao, Zheng Chen, Tung-Chieh Zhou, Guanglei Chang, Chen-Chia Rashingkar, Vineet Chen, Yiran Machine Learning Modern very large-scale integration (VLSI) design requires the implementation of integrated circuits using electronic design automation (EDA) tools. Due to the complexity of EDA algorithms, the vast parameter space poses a huge challenge to chip design optimization, as the combination of even moderate numbers of parameters creates an enormous solution space to explore. Manual parameter selection remains industrial practice despite being excessively laborious and limited by expert experience. To address this issue, we present CROP, the first large language model (LLM)-powered automatic VLSI design flow tuning framework. Our approach includes: (1) a scalable methodology for transforming RTL source code into dense vector representations, (2) an embedding-based retrieval system for matching designs with semantically similar circuits, and (3) a retrieval-augmented generation (RAG)-enhanced LLM-guided parameter search system that constrains the search process with prior knowledge from similar designs. Experiment results demonstrate CROP's ability to achieve superior quality-of-results (QoR) with fewer iterations than existing approaches on industrial designs, including a 9.9% reduction in power consumption. |
| title | CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs |
| topic | Machine Learning |
| url | https://arxiv.org/abs/2507.02128 |