AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models
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arXiv
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| Autori principali: | , , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2025
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| Soggetti: | |
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| _version_ | 1866912589422788608 |
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| author | Xue, Chenhao Li, Kezhi Zhang, Jiaxing Ren, Yi Shi, Zhengyuan Zhang, Chen Lin, Yibo Zhang, Lining Xu, Qiang Sun, Guangyu |
| author_facet | Xue, Chenhao Li, Kezhi Zhang, Jiaxing Ren, Yi Shi, Zhengyuan Zhang, Chen Lin, Yibo Zhang, Lining Xu, Qiang Sun, Guangyu |
| contents | Arithmetic circuits, such as adders and multipliers, are fundamental components of digital systems, directly impacting the performance, power efficiency, and area footprint. However, optimizing these circuits remains challenging due to the vast design space and complex physical constraints. While recent deep learning-based approaches have shown promise, they struggle to consistently explore high-potential design variants, limiting their optimization efficiency. To address this challenge, we propose AC-Refiner, a novel arithmetic circuit optimization framework leveraging conditional diffusion models. Our key insight is to reframe arithmetic circuit synthesis as a conditional image generation task. By carefully conditioning the denoising diffusion process on target quality-of-results (QoRs), AC-Refiner consistently produces high-quality circuit designs. Furthermore, the explored designs are used to fine-tune the diffusion model, which focuses the exploration near the Pareto frontier. Experimental results demonstrate that AC-Refiner generates designs with superior Pareto optimality, outperforming state-of-the-art baselines. The performance gain is further validated by integrating AC-Refiner into practical applications. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_02598 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models Xue, Chenhao Li, Kezhi Zhang, Jiaxing Ren, Yi Shi, Zhengyuan Zhang, Chen Lin, Yibo Zhang, Lining Xu, Qiang Sun, Guangyu Hardware Architecture Artificial Intelligence Arithmetic circuits, such as adders and multipliers, are fundamental components of digital systems, directly impacting the performance, power efficiency, and area footprint. However, optimizing these circuits remains challenging due to the vast design space and complex physical constraints. While recent deep learning-based approaches have shown promise, they struggle to consistently explore high-potential design variants, limiting their optimization efficiency. To address this challenge, we propose AC-Refiner, a novel arithmetic circuit optimization framework leveraging conditional diffusion models. Our key insight is to reframe arithmetic circuit synthesis as a conditional image generation task. By carefully conditioning the denoising diffusion process on target quality-of-results (QoRs), AC-Refiner consistently produces high-quality circuit designs. Furthermore, the explored designs are used to fine-tune the diffusion model, which focuses the exploration near the Pareto frontier. Experimental results demonstrate that AC-Refiner generates designs with superior Pareto optimality, outperforming state-of-the-art baselines. The performance gain is further validated by integrating AC-Refiner into practical applications. |
| title | AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models |
| topic | Hardware Architecture Artificial Intelligence |
| url | https://arxiv.org/abs/2507.02598 |