ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis
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arXiv
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| Auteurs principaux: | , , , , , |
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| Format: | Preprint |
| Publié: |
2025
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| _version_ | 1866916878735114240 |
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| author | Peng, Zedong Li, Zeju Gao, Mingzhe Xu, Qiang Zhang, Chen Zhao, Jieru |
| author_facet | Peng, Zedong Li, Zeju Gao, Mingzhe Xu, Qiang Zhang, Chen Zhao, Jieru |
| contents | High-Level Synthesis (HLS) plays a crucial role in modern hardware design by transforming high-level code into optimized hardware implementations. However, progress in applying machine learning (ML) to HLS optimization has been hindered by a shortage of sufficiently large and diverse datasets. To bridge this gap, we introduce ForgeHLS, a large-scale, open-source dataset explicitly designed for ML-driven HLS research. ForgeHLS comprises over 400k diverse designs generated from 846 kernels covering a broad range of application domains, consuming over 200k CPU hours during dataset construction. Each kernel includes systematically automated pragma insertions (loop unrolling, pipelining, array partitioning), combined with extensive design space exploration using Bayesian optimization. Compared to existing datasets, ForgeHLS significantly enhances scale, diversity, and design coverage. We further define and evaluate representative downstream tasks in Quality of Result (QoR) prediction and automated pragma exploration, clearly demonstrating ForgeHLS utility for developing and improving ML-based HLS optimization methodologies. The dataset and code are public at https://github.com/zedong-peng/ForgeHLS. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_03255 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis Peng, Zedong Li, Zeju Gao, Mingzhe Xu, Qiang Zhang, Chen Zhao, Jieru Hardware Architecture Artificial Intelligence High-Level Synthesis (HLS) plays a crucial role in modern hardware design by transforming high-level code into optimized hardware implementations. However, progress in applying machine learning (ML) to HLS optimization has been hindered by a shortage of sufficiently large and diverse datasets. To bridge this gap, we introduce ForgeHLS, a large-scale, open-source dataset explicitly designed for ML-driven HLS research. ForgeHLS comprises over 400k diverse designs generated from 846 kernels covering a broad range of application domains, consuming over 200k CPU hours during dataset construction. Each kernel includes systematically automated pragma insertions (loop unrolling, pipelining, array partitioning), combined with extensive design space exploration using Bayesian optimization. Compared to existing datasets, ForgeHLS significantly enhances scale, diversity, and design coverage. We further define and evaluate representative downstream tasks in Quality of Result (QoR) prediction and automated pragma exploration, clearly demonstrating ForgeHLS utility for developing and improving ML-based HLS optimization methodologies. The dataset and code are public at https://github.com/zedong-peng/ForgeHLS. |
| title | ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis |
| topic | Hardware Architecture Artificial Intelligence |
| url | https://arxiv.org/abs/2507.03255 |