Style de citation APA (7e éd.)

Chen, Z., Chang, K., Li, Z., Li, C., He, X., Chen, C., . . . Wang, Y. (2025). ChipSeek: Optimizing Verilog Generation via EDA-Integrated Reinforcement Learning.

Style de citation Chicago (17e éd.)

Chen, Zhirong, et al. ChipSeek: Optimizing Verilog Generation via EDA-Integrated Reinforcement Learning. 2025.

Style de citation MLA (9e éd.)

Chen, Zhirong, et al. ChipSeek: Optimizing Verilog Generation via EDA-Integrated Reinforcement Learning. 2025.