Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics

Fuente: arXiv
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Main Authors: Morsali, Mehrdad, Zhou, Chengwei, Najafi, Deniz, Sarkar, Sreetama, Mercati, Pietro, Khoshavi, Navid, Beerel, Peter, Nikdast, Mahdi, Datta, Gourav, Angizi, Shaahin
Format: Preprint
Published: 2025
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author Morsali, Mehrdad
Zhou, Chengwei
Najafi, Deniz
Sarkar, Sreetama
Mercati, Pietro
Khoshavi, Navid
Beerel, Peter
Nikdast, Mahdi
Datta, Gourav
Angizi, Shaahin
author_facet Morsali, Mehrdad
Zhou, Chengwei
Najafi, Deniz
Sarkar, Sreetama
Mercati, Pietro
Khoshavi, Navid
Beerel, Peter
Nikdast, Mahdi
Datta, Gourav
Angizi, Shaahin
contents Vision Transformers (ViTs) have emerged as a powerful architecture for computer vision tasks due to their ability to model long-range dependencies and global contextual relationships. However, their substantial compute and memory demands hinder efficient deployment in scenarios with strict energy and bandwidth limitations. In this work, we propose OptoViT, the first near-sensor, region-aware ViT accelerator leveraging silicon photonics (SiPh) for real-time and energy-efficient vision processing. Opto-ViT features a hybrid electronic-photonic architecture, where the optical core handles compute-intensive matrix multiplications using Vertical-Cavity Surface-Emitting Lasers (VCSELs) and Microring Resonators (MRs), while nonlinear functions and normalization are executed electronically. To reduce redundant computation and patch processing, we introduce a lightweight Mask Generation Network (MGNet) that identifies regions of interest in the current frame and prunes irrelevant patches before ViT encoding. We further co-optimize the ViT backbone using quantization-aware training and matrix decomposition tailored for photonic constraints. Experiments across device fabrication, circuit and architecture co-design, to classification, detection, and video tasks demonstrate that OptoViT achieves 100.4 KFPS/W with up to 84% energy savings with less than 1.6% accuracy loss, while enabling scalable and efficient ViT deployment at the edge.
format Preprint
id arxiv_https___arxiv_org_abs_2507_07044
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics
Morsali, Mehrdad
Zhou, Chengwei
Najafi, Deniz
Sarkar, Sreetama
Mercati, Pietro
Khoshavi, Navid
Beerel, Peter
Nikdast, Mahdi
Datta, Gourav
Angizi, Shaahin
Hardware Architecture
Vision Transformers (ViTs) have emerged as a powerful architecture for computer vision tasks due to their ability to model long-range dependencies and global contextual relationships. However, their substantial compute and memory demands hinder efficient deployment in scenarios with strict energy and bandwidth limitations. In this work, we propose OptoViT, the first near-sensor, region-aware ViT accelerator leveraging silicon photonics (SiPh) for real-time and energy-efficient vision processing. Opto-ViT features a hybrid electronic-photonic architecture, where the optical core handles compute-intensive matrix multiplications using Vertical-Cavity Surface-Emitting Lasers (VCSELs) and Microring Resonators (MRs), while nonlinear functions and normalization are executed electronically. To reduce redundant computation and patch processing, we introduce a lightweight Mask Generation Network (MGNet) that identifies regions of interest in the current frame and prunes irrelevant patches before ViT encoding. We further co-optimize the ViT backbone using quantization-aware training and matrix decomposition tailored for photonic constraints. Experiments across device fabrication, circuit and architecture co-design, to classification, detection, and video tasks demonstrate that OptoViT achieves 100.4 KFPS/W with up to 84% energy savings with less than 1.6% accuracy loss, while enabling scalable and efficient ViT deployment at the edge.
title Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics
topic Hardware Architecture
url https://arxiv.org/abs/2507.07044