Graphene Heterostructure-Based Non-Volatile Memory Devices with Top Floating Gate Programming
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arXiv
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| Main Authors: | , , , , , , , , , |
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| Format: | Preprint |
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2025
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| _version_ | 1866913936647913472 |
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| author | Rodrigues, Gabriel L. Yoshida, Ana B. Selmi, Guilherme S. de Jesus, Nickolas T. K. B Ricardo, Igor Watanabe, Kenji Taniguchi, Takashi de Oliveira, Rafael F. Lopez-Richard, Victor Cadore, Alisson R. |
| author_facet | Rodrigues, Gabriel L. Yoshida, Ana B. Selmi, Guilherme S. de Jesus, Nickolas T. K. B Ricardo, Igor Watanabe, Kenji Taniguchi, Takashi de Oliveira, Rafael F. Lopez-Richard, Victor Cadore, Alisson R. |
| contents | We present a graphene-based memory platform built on dual-gated field-effect transistors (GFETs). By integrating a lithographically defined metal patch directly atop the hexagonal boron nitride (hBN)-graphene channel, the device functions simultaneously as a top gate, floating gate (FG) reservoir, and active reset contact. This architecture forms an ultrathin van der Waals heterostructure with strong capacitive coupling to the back-gate, confirmed by a dynamic model, enabling a tunable and wide memory window that scales with back-gate voltage and is further enhanced by reducing hBN thickness or increasing FG area. Our devices demonstrate reversible, high-efficiency charge programming, robust non-volatile behavior across 10 to 300 K and a wide range of operation speeds, and endurance beyond 9800 cycles. Importantly, a grounded top electrode provides on-demand charge erasure, offering functionality that is absent in standard FG designs. These results position hBN/graphene-based GFETs as a compact, energy-efficient platform for next-generation 2D flash memory, with implications for multilevel memory schemes and cryogenic electronics. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_07897 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Graphene Heterostructure-Based Non-Volatile Memory Devices with Top Floating Gate Programming Rodrigues, Gabriel L. Yoshida, Ana B. Selmi, Guilherme S. de Jesus, Nickolas T. K. B Ricardo, Igor Watanabe, Kenji Taniguchi, Takashi de Oliveira, Rafael F. Lopez-Richard, Victor Cadore, Alisson R. Applied Physics Mesoscale and Nanoscale Physics We present a graphene-based memory platform built on dual-gated field-effect transistors (GFETs). By integrating a lithographically defined metal patch directly atop the hexagonal boron nitride (hBN)-graphene channel, the device functions simultaneously as a top gate, floating gate (FG) reservoir, and active reset contact. This architecture forms an ultrathin van der Waals heterostructure with strong capacitive coupling to the back-gate, confirmed by a dynamic model, enabling a tunable and wide memory window that scales with back-gate voltage and is further enhanced by reducing hBN thickness or increasing FG area. Our devices demonstrate reversible, high-efficiency charge programming, robust non-volatile behavior across 10 to 300 K and a wide range of operation speeds, and endurance beyond 9800 cycles. Importantly, a grounded top electrode provides on-demand charge erasure, offering functionality that is absent in standard FG designs. These results position hBN/graphene-based GFETs as a compact, energy-efficient platform for next-generation 2D flash memory, with implications for multilevel memory schemes and cryogenic electronics. |
| title | Graphene Heterostructure-Based Non-Volatile Memory Devices with Top Floating Gate Programming |
| topic | Applied Physics Mesoscale and Nanoscale Physics |
| url | https://arxiv.org/abs/2507.07897 |