Hardware-Aware Feature Extraction Quantisation for Real-Time Visual Odometry on FPGA Platforms

Fuente: arXiv
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Autores principales: Wasala, Mateusz, Smolarczyk, Mateusz, Danilowicz, Michal, Kryjak, Tomasz
Formato: Preprint
Publicado: 2025
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author Wasala, Mateusz
Smolarczyk, Mateusz
Danilowicz, Michal
Kryjak, Tomasz
author_facet Wasala, Mateusz
Smolarczyk, Mateusz
Danilowicz, Michal
Kryjak, Tomasz
contents Accurate position estimation is essential for modern navigation systems deployed in autonomous platforms, including ground vehicles, marine vessels, and aerial drones. In this context, Visual Simultaneous Localisation and Mapping (VSLAM) - which includes Visual Odometry - relies heavily on the reliable extraction of salient feature points from the visual input data. In this work, we propose an embedded implementation of an unsupervised architecture capable of detecting and describing feature points. It is based on a quantised SuperPoint convolutional neural network. Our objective is to minimise the computational demands of the model while preserving high detection quality, thus facilitating efficient deployment on platforms with limited resources, such as mobile or embedded systems. We implemented the solution on an FPGA System-on-Chip (SoC) platform, specifically the AMD/Xilinx Zynq UltraScale+, where we evaluated the performance of Deep Learning Processing Units (DPUs) and we also used the Brevitas library and the FINN framework to perform model quantisation and hardware-aware optimisation. This allowed us to process 640 x 480 pixel images at up to 54 fps on an FPGA platform, outperforming state-of-the-art solutions in the field. We conducted experiments on the TUM dataset to demonstrate and discuss the impact of different quantisation techniques on the accuracy and performance of the model in a visual odometry task.
format Preprint
id arxiv_https___arxiv_org_abs_2507_07903
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Hardware-Aware Feature Extraction Quantisation for Real-Time Visual Odometry on FPGA Platforms
Wasala, Mateusz
Smolarczyk, Mateusz
Danilowicz, Michal
Kryjak, Tomasz
Computer Vision and Pattern Recognition
Image and Video Processing
Accurate position estimation is essential for modern navigation systems deployed in autonomous platforms, including ground vehicles, marine vessels, and aerial drones. In this context, Visual Simultaneous Localisation and Mapping (VSLAM) - which includes Visual Odometry - relies heavily on the reliable extraction of salient feature points from the visual input data. In this work, we propose an embedded implementation of an unsupervised architecture capable of detecting and describing feature points. It is based on a quantised SuperPoint convolutional neural network. Our objective is to minimise the computational demands of the model while preserving high detection quality, thus facilitating efficient deployment on platforms with limited resources, such as mobile or embedded systems. We implemented the solution on an FPGA System-on-Chip (SoC) platform, specifically the AMD/Xilinx Zynq UltraScale+, where we evaluated the performance of Deep Learning Processing Units (DPUs) and we also used the Brevitas library and the FINN framework to perform model quantisation and hardware-aware optimisation. This allowed us to process 640 x 480 pixel images at up to 54 fps on an FPGA platform, outperforming state-of-the-art solutions in the field. We conducted experiments on the TUM dataset to demonstrate and discuss the impact of different quantisation techniques on the accuracy and performance of the model in a visual odometry task.
title Hardware-Aware Feature Extraction Quantisation for Real-Time Visual Odometry on FPGA Platforms
topic Computer Vision and Pattern Recognition
Image and Video Processing
url https://arxiv.org/abs/2507.07903