OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads
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arXiv
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| Main Authors: | , , , , , , , , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866916843902468096 |
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| author | Wang, Xinxin Yan, Lixian Liu, Shuhan Upton, Luke Cai, Zhuoqi Tan, Yiming Li, Shengman Jana, Koustav Li, Peijing Cirimelli-Low, Jesse Tambe, Thierry Guthaus, Matthew Wong, H. -S. Philip |
| author_facet | Wang, Xinxin Yan, Lixian Liu, Shuhan Upton, Luke Cai, Zhuoqi Tan, Yiming Li, Shengman Jana, Koustav Li, Peijing Cirimelli-Low, Jesse Tambe, Thierry Guthaus, Matthew Wong, H. -S. Philip |
| contents | Gain Cell memory (GCRAM) offers higher density and lower power than SRAM, making it a promising candidate for on-chip memory in domain-specific accelerators. To support workloads with varying traffic and lifetime metrics, GCRAM also offers high bandwidth, ultra low leakage power and a wide range of retention times, which can be adjusted through transistor design (like threshold voltage and channel material) and on-the-fly by changing the operating voltage. However, designing and optimizing GCRAM sub-systems can be time-consuming. In this paper, we present OpenGCRAM, an open-source GCRAM compiler capable of generating GCRAM bank circuit designs and DRC- and LVS-clean layouts for commercially available foundry CMOS, while also providing area, delay, and power simulations based on user-specified configurations (e.g., word size and number of words). OpenGCRAM enables fast, accurate, customizable, and optimized GCRAM block generation, reduces design time, ensure process compliance, and delivers performance-tailored memory blocks that meet diverse application requirements. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_10849 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads Wang, Xinxin Yan, Lixian Liu, Shuhan Upton, Luke Cai, Zhuoqi Tan, Yiming Li, Shengman Jana, Koustav Li, Peijing Cirimelli-Low, Jesse Tambe, Thierry Guthaus, Matthew Wong, H. -S. Philip Hardware Architecture Systems and Control Gain Cell memory (GCRAM) offers higher density and lower power than SRAM, making it a promising candidate for on-chip memory in domain-specific accelerators. To support workloads with varying traffic and lifetime metrics, GCRAM also offers high bandwidth, ultra low leakage power and a wide range of retention times, which can be adjusted through transistor design (like threshold voltage and channel material) and on-the-fly by changing the operating voltage. However, designing and optimizing GCRAM sub-systems can be time-consuming. In this paper, we present OpenGCRAM, an open-source GCRAM compiler capable of generating GCRAM bank circuit designs and DRC- and LVS-clean layouts for commercially available foundry CMOS, while also providing area, delay, and power simulations based on user-specified configurations (e.g., word size and number of words). OpenGCRAM enables fast, accurate, customizable, and optimized GCRAM block generation, reduces design time, ensure process compliance, and delivers performance-tailored memory blocks that meet diverse application requirements. |
| title | OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads |
| topic | Hardware Architecture Systems and Control |
| url | https://arxiv.org/abs/2507.10849 |