Security Enclave Architecture for Heterogeneous Security Primitives for Supply-Chain Attacks
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arXiv
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| Auteurs principaux: | , , , , |
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| Format: | Preprint |
| Publié: |
2025
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| _version_ | 1866912484063969280 |
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| author | Raj, Kshitij Chatterjee, Atri SLPSK, Patanjali Bhunia, Swarup Ray, Sandip |
| author_facet | Raj, Kshitij Chatterjee, Atri SLPSK, Patanjali Bhunia, Swarup Ray, Sandip |
| contents | Designing secure architectures for system-on-chip (SoC) platforms is a highly intricate and time-intensive task, often requiring months of development and meticulous verification. Even minor architectural oversights can lead to critical vulnerabilities that undermine the security of the entire chip. In response to this challenge, we introduce CITADEL, a modular security framework aimed at streamlining the creation of robust security architectures for SoCs. CITADEL offers a configurable, plug-and-play subsystem composed of custom intellectual property (IP) blocks, enabling the construction of diverse security mechanisms tailored to specific threats. As a concrete demonstration, we instantiate CITADEL to defend against supply-chain threats, illustrating how the framework adapts to one of the most pressing concerns in hardware security. This paper explores the range of obstacles encountered when building a unified security architecture capable of addressing multiple attack vectors and presents CITADEL's strategies for overcoming them. Through several real-world case studies, we showcase the practical implementation of CITADEL and present a thorough evaluation of its impact on silicon area and power consumption across various ASIC technologies. Results indicate that CITADEL introduces only minimal resource overhead, making it a practical solution for enhancing SoC security. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_10971 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Security Enclave Architecture for Heterogeneous Security Primitives for Supply-Chain Attacks Raj, Kshitij Chatterjee, Atri SLPSK, Patanjali Bhunia, Swarup Ray, Sandip Hardware Architecture Cryptography and Security Designing secure architectures for system-on-chip (SoC) platforms is a highly intricate and time-intensive task, often requiring months of development and meticulous verification. Even minor architectural oversights can lead to critical vulnerabilities that undermine the security of the entire chip. In response to this challenge, we introduce CITADEL, a modular security framework aimed at streamlining the creation of robust security architectures for SoCs. CITADEL offers a configurable, plug-and-play subsystem composed of custom intellectual property (IP) blocks, enabling the construction of diverse security mechanisms tailored to specific threats. As a concrete demonstration, we instantiate CITADEL to defend against supply-chain threats, illustrating how the framework adapts to one of the most pressing concerns in hardware security. This paper explores the range of obstacles encountered when building a unified security architecture capable of addressing multiple attack vectors and presents CITADEL's strategies for overcoming them. Through several real-world case studies, we showcase the practical implementation of CITADEL and present a thorough evaluation of its impact on silicon area and power consumption across various ASIC technologies. Results indicate that CITADEL introduces only minimal resource overhead, making it a practical solution for enhancing SoC security. |
| title | Security Enclave Architecture for Heterogeneous Security Primitives for Supply-Chain Attacks |
| topic | Hardware Architecture Cryptography and Security |
| url | https://arxiv.org/abs/2507.10971 |