Fault-Free Analog Computing with Imperfect Hardware
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arXiv
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| Autori principali: | , , , , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2025
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| _version_ | 1866916844598722560 |
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| author | Xu, Zhicheng Liu, Jiawei Huang, Sitao Li, Zefan Wang, Shengbo Wen, Bo Mao, Ruibin Jiang, Mingrui Pedretti, Giacomo Ignowski, Jim Huang, Kaibin Li, Can |
| author_facet | Xu, Zhicheng Liu, Jiawei Huang, Sitao Li, Zefan Wang, Shengbo Wen, Bo Mao, Ruibin Jiang, Mingrui Pedretti, Giacomo Ignowski, Jim Huang, Kaibin Li, Can |
| contents | The growing demand for edge computing and AI drives research into analog in-memory computing using memristors, which overcome data movement bottlenecks by computing directly within memory. However, device failures and variations critically limit analog systems' precision and reliability. Existing fault-tolerance techniques, such as redundancy and retraining, are often inadequate for high-precision applications or scenarios requiring fixed matrices and privacy preservation. Here, we introduce and experimentally demonstrate a fault-free matrix representation where target matrices are decomposed into products of two adjustable sub-matrices programmed onto analog hardware. This indirect, adaptive representation enables mathematical optimization to bypass faulty devices and eliminate differential pairs, significantly enhancing computational density. Our memristor-based system achieved >99.999% cosine similarity for a Discrete Fourier Transform matrix despite 39% device fault rate, a fidelity unattainable with conventional direct representation, which fails with single device faults (0.01% rate). We demonstrated 56-fold bit-error-rate reduction in wireless communication and >196% density with 179% energy efficiency improvements compared to state-of-the-art techniques. This method, validated on memristors, applies broadly to emerging memories and non-electrical computing substrates, showing that device yield is no longer the primary bottleneck in analog computing hardware. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_11134 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Fault-Free Analog Computing with Imperfect Hardware Xu, Zhicheng Liu, Jiawei Huang, Sitao Li, Zefan Wang, Shengbo Wen, Bo Mao, Ruibin Jiang, Mingrui Pedretti, Giacomo Ignowski, Jim Huang, Kaibin Li, Can Emerging Technologies Hardware Architecture The growing demand for edge computing and AI drives research into analog in-memory computing using memristors, which overcome data movement bottlenecks by computing directly within memory. However, device failures and variations critically limit analog systems' precision and reliability. Existing fault-tolerance techniques, such as redundancy and retraining, are often inadequate for high-precision applications or scenarios requiring fixed matrices and privacy preservation. Here, we introduce and experimentally demonstrate a fault-free matrix representation where target matrices are decomposed into products of two adjustable sub-matrices programmed onto analog hardware. This indirect, adaptive representation enables mathematical optimization to bypass faulty devices and eliminate differential pairs, significantly enhancing computational density. Our memristor-based system achieved >99.999% cosine similarity for a Discrete Fourier Transform matrix despite 39% device fault rate, a fidelity unattainable with conventional direct representation, which fails with single device faults (0.01% rate). We demonstrated 56-fold bit-error-rate reduction in wireless communication and >196% density with 179% energy efficiency improvements compared to state-of-the-art techniques. This method, validated on memristors, applies broadly to emerging memories and non-electrical computing substrates, showing that device yield is no longer the primary bottleneck in analog computing hardware. |
| title | Fault-Free Analog Computing with Imperfect Hardware |
| topic | Emerging Technologies Hardware Architecture |
| url | https://arxiv.org/abs/2507.11134 |