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| Autori principali: | , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2025
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| Soggetti: | |
| Accesso online: | https://arxiv.org/abs/2507.14891 |
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| _version_ | 1866918159915679744 |
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| author | Gao, Xiangyu Li, Tong Zhang, Yinchao Wang, Ziqiang Zeng, Xiangsheng Yao, Su Xu, Ke |
| author_facet | Gao, Xiangyu Li, Tong Zhang, Yinchao Wang, Ziqiang Zeng, Xiangsheng Yao, Su Xu, Ke |
| contents | Machine learning (ML) is increasingly used in network data planes for advanced traffic analysis, but existing solutions (such as FlowLens, N3IC, BoS) still struggle to simultaneously achieve low latency, high throughput, and high accuracy. To address these challenges, we present FENIX, a hybrid in-network ML system that performs feature extraction on programmable switch ASICs and deep neural network inference on FPGAs. FENIX introduces a Data Engine that leverages a probabilistic token bucket algorithm to control the sending rate of feature streams, effectively addressing the throughput gap between programmable switch ASICs and FPGAs. In addition, FENIX designs a Model Engine to enable high-accuracy deep neural network inference in the network, overcoming the difficulty of deploying complex models on resource-constrained switch chips. We implement FENIX on a programmable switch platform that integrates a Tofino ASIC and a ZU19EG FPGA directly, and evaluate it on real-world network traffic datasets. Our results show that FENIX achieves microsecond-level inference latency and multi-terabit throughput with low hardware overhead, and delivers over 90% accuracy on mainstream network traffic classification tasks, outperforming the state of the art. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_14891 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switches Gao, Xiangyu Li, Tong Zhang, Yinchao Wang, Ziqiang Zeng, Xiangsheng Yao, Su Xu, Ke Networking and Internet Architecture Machine learning (ML) is increasingly used in network data planes for advanced traffic analysis, but existing solutions (such as FlowLens, N3IC, BoS) still struggle to simultaneously achieve low latency, high throughput, and high accuracy. To address these challenges, we present FENIX, a hybrid in-network ML system that performs feature extraction on programmable switch ASICs and deep neural network inference on FPGAs. FENIX introduces a Data Engine that leverages a probabilistic token bucket algorithm to control the sending rate of feature streams, effectively addressing the throughput gap between programmable switch ASICs and FPGAs. In addition, FENIX designs a Model Engine to enable high-accuracy deep neural network inference in the network, overcoming the difficulty of deploying complex models on resource-constrained switch chips. We implement FENIX on a programmable switch platform that integrates a Tofino ASIC and a ZU19EG FPGA directly, and evaluate it on real-world network traffic datasets. Our results show that FENIX achieves microsecond-level inference latency and multi-terabit throughput with low hardware overhead, and delivers over 90% accuracy on mainstream network traffic classification tasks, outperforming the state of the art. |
| title | FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switches |
| topic | Networking and Internet Architecture |
| url | https://arxiv.org/abs/2507.14891 |