On Automating Proofs of Multiplier Adder Trees using the RTL Books
Fuente:
arXiv
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866915409113907200 |
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| author | Manjrekar, Mayank |
| author_facet | Manjrekar, Mayank |
| contents | We present an experimental, verified clause processor ctv-cp that fits into the framework used at Arm for formal verification of arithmetic hardware designs. This largely automates the ACL2 proof development effort for integer multiplier modules that exist in designs ranging from floating-point division to matrix multiplication. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2507_19010 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | On Automating Proofs of Multiplier Adder Trees using the RTL Books Manjrekar, Mayank Logic in Computer Science Symbolic Computation We present an experimental, verified clause processor ctv-cp that fits into the framework used at Arm for formal verification of arithmetic hardware designs. This largely automates the ACL2 proof development effort for integer multiplier modules that exist in designs ranging from floating-point division to matrix multiplication. |
| title | On Automating Proofs of Multiplier Adder Trees using the RTL Books |
| topic | Logic in Computer Science Symbolic Computation |
| url | https://arxiv.org/abs/2507.19010 |