Analog Solver Circuit for Linear Symmetric Positive-Definite Systems at a Complexity Independent of Matrix Size
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arXiv
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| Autores principales: | , , , |
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| Formato: | Preprint |
| Publicado: |
2025
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| _version_ | 1866912844826542080 |
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| author | Abdelaleim, Osama Prakash, Arun Irfanoglu, Ayhan Milutinovic, Veljko |
| author_facet | Abdelaleim, Osama Prakash, Arun Irfanoglu, Ayhan Milutinovic, Veljko |
| contents | Accelerating the solution of linear systems of equations is critical due to their central role in numerous applications, such as numerical simulations, data analytics, and machine learning. This paper presents an analog solver circuit designed to accelerate the solution of symmetric positive definite (SPD) linear systems of equations. The proposed design leverages noninverting operational amplifier configurations to create a negative resistance circuit, effectively modeling any symmetric system. The paper details the principles behind the design, optimizations of the system architecture, and numerical results that demonstrate the robustness of the design. The findings reveal that the proposed system solves symmetric diagonally dominant (SDD) matrices with O(1) complexity, achieving the theoretical maximum speed as the circuit relies solely on resistors. For non-diagonally dominant SPD systems, the solution speed depends on matrix properties, specifically eigenvalues and diagonal dominance deviation, but remains independent of the size of the matrix. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2508_04609 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Analog Solver Circuit for Linear Symmetric Positive-Definite Systems at a Complexity Independent of Matrix Size Abdelaleim, Osama Prakash, Arun Irfanoglu, Ayhan Milutinovic, Veljko Hardware Architecture Accelerating the solution of linear systems of equations is critical due to their central role in numerous applications, such as numerical simulations, data analytics, and machine learning. This paper presents an analog solver circuit designed to accelerate the solution of symmetric positive definite (SPD) linear systems of equations. The proposed design leverages noninverting operational amplifier configurations to create a negative resistance circuit, effectively modeling any symmetric system. The paper details the principles behind the design, optimizations of the system architecture, and numerical results that demonstrate the robustness of the design. The findings reveal that the proposed system solves symmetric diagonally dominant (SDD) matrices with O(1) complexity, achieving the theoretical maximum speed as the circuit relies solely on resistors. For non-diagonally dominant SPD systems, the solution speed depends on matrix properties, specifically eigenvalues and diagonal dominance deviation, but remains independent of the size of the matrix. |
| title | Analog Solver Circuit for Linear Symmetric Positive-Definite Systems at a Complexity Independent of Matrix Size |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2508.04609 |