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Hauptverfasser: Bremer, Bram, Bigelow, Matthew, Anstee, Stuart, Cohen, Gregory, van Schaik, Andre, Xu, Ying
Format: Preprint
Veröffentlicht: 2025
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Online-Zugang:https://arxiv.org/abs/2508.07523
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author Bremer, Bram
Bigelow, Matthew
Anstee, Stuart
Cohen, Gregory
van Schaik, Andre
Xu, Ying
author_facet Bremer, Bram
Bigelow, Matthew
Anstee, Stuart
Cohen, Gregory
van Schaik, Andre
Xu, Ying
contents This paper presents a real-time, energy-efficient embedded system implementing an array of Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260 System-on-Module (SoM), the system integrates a Rust-based software framework on the processor for real-time interfacing and synchronization with multiple hydrophone inputs, and a hardware-accelerated implementation of the CARFAC models on a Field-Programmable Gate Array (FPGA) for real-time sound pre-processing. Compared to prior work, the CARFAC accelerator achieves improved scalability and processing speed while reducing resource usage through optimized time-multiplexing, pipelined design, and elimination of costly division circuits. Experimental results demonstrate 13.5% hardware utilization for a single 64-channel CARFAC instance and a whole board power consumption of 3.11 W when processing a 256 kHz input signal in real time.
format Preprint
id arxiv_https___arxiv_org_abs_2508_07523
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems
Bremer, Bram
Bigelow, Matthew
Anstee, Stuart
Cohen, Gregory
van Schaik, Andre
Xu, Ying
Audio and Speech Processing
Sound
92C50 (Primary) 68Q25, 94A12 (Secondary)
This paper presents a real-time, energy-efficient embedded system implementing an array of Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260 System-on-Module (SoM), the system integrates a Rust-based software framework on the processor for real-time interfacing and synchronization with multiple hydrophone inputs, and a hardware-accelerated implementation of the CARFAC models on a Field-Programmable Gate Array (FPGA) for real-time sound pre-processing. Compared to prior work, the CARFAC accelerator achieves improved scalability and processing speed while reducing resource usage through optimized time-multiplexing, pipelined design, and elimination of costly division circuits. Experimental results demonstrate 13.5% hardware utilization for a single 64-channel CARFAC instance and a whole board power consumption of 3.11 W when processing a 256 kHz input signal in real time.
title Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems
topic Audio and Speech Processing
Sound
92C50 (Primary) 68Q25, 94A12 (Secondary)
url https://arxiv.org/abs/2508.07523