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| Main Authors: | , , |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2508.13225 |
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| _version_ | 1866911110414729216 |
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| author | Bhardwaj, Kapil Paasio, Ella Majumdar, Sayani |
| author_facet | Bhardwaj, Kapil Paasio, Ella Majumdar, Sayani |
| contents | The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive memories have been extensively explored for synaptic implementation in CIM architectures, their inherent limitations, including static power dissipation, sneak-path currents, and interconnect voltage drops, pose significant challenges for large-scale deployment, particularly at advanced technology nodes. In contrast, capacitive memories offer a compelling alternative by enabling charge-domain computation with virtually zero static power loss, intrinsic immunity to sneak paths, and simplified selector-less crossbar operation, while offering superior compatibility with 3D Back-end-of-Line (BEOL) integration. This perspective highlights the architectural and device-level advantages of emerging non-volatile capacitive synapses. We examine how material engineering and interface control can modulate synaptic behavior, capacitive memory window and multilevel analog storage potential. Furthermore, we explore critical system-level trade-offs involving device-to-device variation, charge transfer noise, dynamic range, and effective analog resolution. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2508_13225 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Towards Capacitive In-Memory-computing: A perspective on the future of AI hardware Bhardwaj, Kapil Paasio, Ella Majumdar, Sayani Materials Science The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive memories have been extensively explored for synaptic implementation in CIM architectures, their inherent limitations, including static power dissipation, sneak-path currents, and interconnect voltage drops, pose significant challenges for large-scale deployment, particularly at advanced technology nodes. In contrast, capacitive memories offer a compelling alternative by enabling charge-domain computation with virtually zero static power loss, intrinsic immunity to sneak paths, and simplified selector-less crossbar operation, while offering superior compatibility with 3D Back-end-of-Line (BEOL) integration. This perspective highlights the architectural and device-level advantages of emerging non-volatile capacitive synapses. We examine how material engineering and interface control can modulate synaptic behavior, capacitive memory window and multilevel analog storage potential. Furthermore, we explore critical system-level trade-offs involving device-to-device variation, charge transfer noise, dynamic range, and effective analog resolution. |
| title | Towards Capacitive In-Memory-computing: A perspective on the future of AI hardware |
| topic | Materials Science |
| url | https://arxiv.org/abs/2508.13225 |