ViTAD: Timing Violation-Aware Debugging of RTL Code using Large Language Models

Fuente: arXiv

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Bibliographic Details
Main Authors:	Lv, Wenhao, Xia, Yingjie, Chen, Xiyuan, Kuang, Li
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture Artificial Intelligence
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2508.13257