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Main Authors: Zhang, Qiao, Alomairy, Rabab, Wang, Dali, Gu, Zhuowei, Cao, Qinglei
Format: Preprint
Published: 2025
Subjects:
Online Access:https://arxiv.org/abs/2508.14848
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author Zhang, Qiao
Alomairy, Rabab
Wang, Dali
Gu, Zhuowei
Cao, Qinglei
author_facet Zhang, Qiao
Alomairy, Rabab
Wang, Dali
Gu, Zhuowei
Cao, Qinglei
contents General Matrix Multiplication (GEMM) is a critical operation underpinning a wide range of applications in high-performance computing (HPC) and artificial intelligence (AI). The emergence of hardware optimized for low-precision arithmetic necessitates a reevaluation of numerical algorithms to leverage mixed-precision computations, achieving improved performance and energy efficiency. This research introduces an adaptive mixed-precision GEMM framework that supports different precision formats at fine-grained tile/block levels. We utilize the PaRSEC runtime system to balance workloads across various architectures. The performance scales well on ARM CPU-based Fugaku supercomputer, Nvidia GPU-based A100 DGX, and AMD GPU-based Frontier supercomputer. This research aims to enhance computational efficiency and accuracy by bridging algorithmic advancements and hardware innovations, driving transformative progress in various applications.
format Preprint
id arxiv_https___arxiv_org_abs_2508_14848
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Leveraging Hardware-Aware Computation in Mixed-Precision Matrix Multiply: A Tile-Centric Approach
Zhang, Qiao
Alomairy, Rabab
Wang, Dali
Gu, Zhuowei
Cao, Qinglei
Distributed, Parallel, and Cluster Computing
General Matrix Multiplication (GEMM) is a critical operation underpinning a wide range of applications in high-performance computing (HPC) and artificial intelligence (AI). The emergence of hardware optimized for low-precision arithmetic necessitates a reevaluation of numerical algorithms to leverage mixed-precision computations, achieving improved performance and energy efficiency. This research introduces an adaptive mixed-precision GEMM framework that supports different precision formats at fine-grained tile/block levels. We utilize the PaRSEC runtime system to balance workloads across various architectures. The performance scales well on ARM CPU-based Fugaku supercomputer, Nvidia GPU-based A100 DGX, and AMD GPU-based Frontier supercomputer. This research aims to enhance computational efficiency and accuracy by bridging algorithmic advancements and hardware innovations, driving transformative progress in various applications.
title Leveraging Hardware-Aware Computation in Mixed-Precision Matrix Multiply: A Tile-Centric Approach
topic Distributed, Parallel, and Cluster Computing
url https://arxiv.org/abs/2508.14848