Fermion-to-Fermion Low-Density Parity-Check Codes

Fuente: arXiv
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Auteurs principaux: Xu, Chong-Yuan, Liu, Ze-Chuan, Xu, Yong
Format: Preprint
Publié: 2025
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_version_ 1866910025230843904
author Xu, Chong-Yuan
Liu, Ze-Chuan
Xu, Yong
author_facet Xu, Chong-Yuan
Liu, Ze-Chuan
Xu, Yong
contents Simulating fermionic systems on qubit-based quantum computers often demands significant computational resources due to the requirement to map fermions to qubits. Thus, designing a fault-tolerant quantum computer that operates directly with fermions offers an effective solution to this challenge. Here, we introduce a protocol for fault-tolerant fermionic quantum computation utilizing fermion-to-fermion low-density parity-check (LDPC) codes. Our method employs a fermionic LDPC memory, which transfers its state to fermionic color code processors, where logical operations are subsequently performed. We propose using odd-weight logical Majorana operators to form the code space, serving as memory for the fermionic LDPC code, and provide an algorithm to identify these logical operators. We present examples showing that the encoding rate of fermionic codes often matches that of qubit codes, while the logical failure rate can be significantly lower than the physical error rate. Furthermore, we propose two methods for performing fermionic lattice surgery to facilitate state transfer. Finally, we simulate the dynamics of a fermionic system using our protocol, illustrating effective error suppression.
format Preprint
id arxiv_https___arxiv_org_abs_2508_15323
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Fermion-to-Fermion Low-Density Parity-Check Codes
Xu, Chong-Yuan
Liu, Ze-Chuan
Xu, Yong
Quantum Physics
Data Structures and Algorithms
Simulating fermionic systems on qubit-based quantum computers often demands significant computational resources due to the requirement to map fermions to qubits. Thus, designing a fault-tolerant quantum computer that operates directly with fermions offers an effective solution to this challenge. Here, we introduce a protocol for fault-tolerant fermionic quantum computation utilizing fermion-to-fermion low-density parity-check (LDPC) codes. Our method employs a fermionic LDPC memory, which transfers its state to fermionic color code processors, where logical operations are subsequently performed. We propose using odd-weight logical Majorana operators to form the code space, serving as memory for the fermionic LDPC code, and provide an algorithm to identify these logical operators. We present examples showing that the encoding rate of fermionic codes often matches that of qubit codes, while the logical failure rate can be significantly lower than the physical error rate. Furthermore, we propose two methods for performing fermionic lattice surgery to facilitate state transfer. Finally, we simulate the dynamics of a fermionic system using our protocol, illustrating effective error suppression.
title Fermion-to-Fermion Low-Density Parity-Check Codes
topic Quantum Physics
Data Structures and Algorithms
url https://arxiv.org/abs/2508.15323