APA (7th ed.) Citation

Teng, F., Pan, M., Zhang, X., He, Z., Yang, Y., Chai, X., . . . Yin, J. (2025). VERIRL: Boosting the LLM-based Verilog Code Generation via Reinforcement Learning.

Chicago Style (17th ed.) Citation

Teng, Fu, Miao Pan, Xuhong Zhang, Zhezhi He, Yiyao Yang, Xinyi Chai, Mengnan Qi, Liqiang Lu, and Jianwei Yin. VERIRL: Boosting the LLM-based Verilog Code Generation via Reinforcement Learning. 2025.

MLA (9th ed.) Citation

Teng, Fu, et al. VERIRL: Boosting the LLM-based Verilog Code Generation via Reinforcement Learning. 2025.