Support Vector Machines Classification on Bendable RISC-V
Fuente:
arXiv
Saved in:
| Main Authors: | , , , , |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866914008929402880 |
|---|---|
| author | Vergos, Polykarpos Vergos, Theofanis Afentaki, Florentia Balaskas, Konstantinos Zervakis, Georgios |
| author_facet | Vergos, Polykarpos Vergos, Theofanis Afentaki, Florentia Balaskas, Konstantinos Zervakis, Georgios |
| contents | Flexible Electronics (FE) technology offers uniquecharacteristics in electronic manufacturing, providing ultra-low-cost, lightweight, and environmentally-friendly alternatives totraditional rigid electronics. These characteristics enable a rangeof applications that were previously constrained by the costand rigidity of conventional silicon technology. Machine learning (ML) is essential for enabling autonomous, real-time intelligenceon devices with smart sensing capabilities in everyday objects. However, the large feature sizes and high power consumption ofthe devices oppose a challenge in the realization of flexible ML applications. To address the above, we propose an open-source framework for developing ML co-processors for the Bendable RISC-V core. In addition, we present a custom ML accelerator architecture for Support Vector Machine (SVM), supporting both one-vs-one (OvO) and one-vs-rest (OvR) algorithms. Our ML accelerator adopts a generic, precision-scalable design, supporting 4-, 8-, and 16-bit weight representations. Experimental results demonstrate a 21x improvement in both inference execution time and energy efficiency, on average, highlighting its potential for low-power, flexible intelligence on the edge. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2508_19656 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Support Vector Machines Classification on Bendable RISC-V Vergos, Polykarpos Vergos, Theofanis Afentaki, Florentia Balaskas, Konstantinos Zervakis, Georgios Hardware Architecture Flexible Electronics (FE) technology offers uniquecharacteristics in electronic manufacturing, providing ultra-low-cost, lightweight, and environmentally-friendly alternatives totraditional rigid electronics. These characteristics enable a rangeof applications that were previously constrained by the costand rigidity of conventional silicon technology. Machine learning (ML) is essential for enabling autonomous, real-time intelligenceon devices with smart sensing capabilities in everyday objects. However, the large feature sizes and high power consumption ofthe devices oppose a challenge in the realization of flexible ML applications. To address the above, we propose an open-source framework for developing ML co-processors for the Bendable RISC-V core. In addition, we present a custom ML accelerator architecture for Support Vector Machine (SVM), supporting both one-vs-one (OvO) and one-vs-rest (OvR) algorithms. Our ML accelerator adopts a generic, precision-scalable design, supporting 4-, 8-, and 16-bit weight representations. Experimental results demonstrate a 21x improvement in both inference execution time and energy efficiency, on average, highlighting its potential for low-power, flexible intelligence on the edge. |
| title | Support Vector Machines Classification on Bendable RISC-V |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2508.19656 |