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| Autores principales: | , |
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| Formato: | Preprint |
| Publicado: |
2025
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| Materias: | |
| Acceso en línea: | https://arxiv.org/abs/2508.21606 |
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| _version_ | 1866914013795844096 |
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| author | Chinnasami, Nishant Karakchi, Rasha |
| author_facet | Chinnasami, Nishant Karakchi, Rasha |
| contents | AES-128 encryption is theoretically secure but vulnerable in practical deployments due to timing and fault injection attacks on embedded systems. This work presents a lightweight dual-detection framework combining statistical thresholding and machine learning (ML) for real-time anomaly detection. By simulating anomalies via delays and ciphertext corruption, we collect timing and data features to evaluate two strategies: (1) a statistical threshold method based on execution time and (2) a Random Forest classifier trained on block-level anomalies. Implemented on CPU and FPGA (PYNQ-Z1), our results show that the ML approach outperforms static thresholds in accuracy, while maintaining real-time feasibility on embedded platforms. The framework operates without modifying AES internals or relying on hardware performance counters. This makes it especially suitable for low-power, resource-constrained systems where detection accuracy and computational efficiency must be balanced. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2508_21606 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Hybrid Cryptographic Monitoring System for Side-Channel Attack Detection on PYNQ SoCs Chinnasami, Nishant Karakchi, Rasha Cryptography and Security AES-128 encryption is theoretically secure but vulnerable in practical deployments due to timing and fault injection attacks on embedded systems. This work presents a lightweight dual-detection framework combining statistical thresholding and machine learning (ML) for real-time anomaly detection. By simulating anomalies via delays and ciphertext corruption, we collect timing and data features to evaluate two strategies: (1) a statistical threshold method based on execution time and (2) a Random Forest classifier trained on block-level anomalies. Implemented on CPU and FPGA (PYNQ-Z1), our results show that the ML approach outperforms static thresholds in accuracy, while maintaining real-time feasibility on embedded platforms. The framework operates without modifying AES internals or relying on hardware performance counters. This makes it especially suitable for low-power, resource-constrained systems where detection accuracy and computational efficiency must be balanced. |
| title | Hybrid Cryptographic Monitoring System for Side-Channel Attack Detection on PYNQ SoCs |
| topic | Cryptography and Security |
| url | https://arxiv.org/abs/2508.21606 |