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Hauptverfasser: González, J. L., Moreno, R. L., Vázquez, D.
Format: Preprint
Veröffentlicht: 2025
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Online-Zugang:https://arxiv.org/abs/2509.01770
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author González, J. L.
Moreno, R. L.
Vázquez, D.
author_facet González, J. L.
Moreno, R. L.
Vázquez, D.
contents This paper investigates the impact of technological constraints on passive elements in the design of inductively degenerated CMOS low-noise amplifiers (LNAs). A theoretical analysis is combined with circuit simulations in a 130-nm CMOS process at 2.45~GHz to explore how the available inductance and capacitance values limit key design objectives such as maximum gain, minimum power consumption, and transistor sizing. Results show that these limits significantly restrict the achievable design space, particularly for low-power implementations, and highlight the need to incorporate detailed passive-element models into RF integrated circuit design flows.
format Preprint
id arxiv_https___arxiv_org_abs_2509_01770
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Impact of Passive Element Technological Limits on CMOS Low-Noise Amplifier Design
González, J. L.
Moreno, R. L.
Vázquez, D.
Systems and Control
This paper investigates the impact of technological constraints on passive elements in the design of inductively degenerated CMOS low-noise amplifiers (LNAs). A theoretical analysis is combined with circuit simulations in a 130-nm CMOS process at 2.45~GHz to explore how the available inductance and capacitance values limit key design objectives such as maximum gain, minimum power consumption, and transistor sizing. Results show that these limits significantly restrict the achievable design space, particularly for low-power implementations, and highlight the need to incorporate detailed passive-element models into RF integrated circuit design flows.
title Impact of Passive Element Technological Limits on CMOS Low-Noise Amplifier Design
topic Systems and Control
url https://arxiv.org/abs/2509.01770