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| Main Authors: | , , , , |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2509.02094 |
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| _version_ | 1866908515278258176 |
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| author | Aubergier, Nathan Renard, Vincent T. Barraud, Sylvain Takashina, Kei Piot, Benjamin A. |
| author_facet | Aubergier, Nathan Renard, Vincent T. Barraud, Sylvain Takashina, Kei Piot, Benjamin A. |
| contents | The valley splitting of 2D electrons in doubly-gated silicon-on-insulator quantum wells is studied by low temperature transport measurements under magnetic fields. At the buried thermal-oxide SiO$_{2}$ interface, the valley splitting increases as a function of the electrostatic bias $δn = n_{B}-n_{F}$ (where $n_{B}$ and $n_{F}$ are electron densities contributed by back and front gates, respectively) and reaches values as high as $6.3$~meV, independent of the total carrier concentration of the channel. We show that $δn$ tunes the square of the wave function modulus at the interface and its penetration into the barrier, both of which are key quantities in a theory describing interface-induced valley splitting, and is therefore the natural experimental parameter to manipulate valleys in 2D silicon systems. At the front interface, made of a thin ``high-k'' dielectric, a smaller valley splitting is observed, adding further options to tune the valley splitting within a single device. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2509_02094 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Wide Electrical Tunability of the Valley Splitting in a Doubly gated Silicon-on-Insulator Quantum Well Aubergier, Nathan Renard, Vincent T. Barraud, Sylvain Takashina, Kei Piot, Benjamin A. Mesoscale and Nanoscale Physics The valley splitting of 2D electrons in doubly-gated silicon-on-insulator quantum wells is studied by low temperature transport measurements under magnetic fields. At the buried thermal-oxide SiO$_{2}$ interface, the valley splitting increases as a function of the electrostatic bias $δn = n_{B}-n_{F}$ (where $n_{B}$ and $n_{F}$ are electron densities contributed by back and front gates, respectively) and reaches values as high as $6.3$~meV, independent of the total carrier concentration of the channel. We show that $δn$ tunes the square of the wave function modulus at the interface and its penetration into the barrier, both of which are key quantities in a theory describing interface-induced valley splitting, and is therefore the natural experimental parameter to manipulate valleys in 2D silicon systems. At the front interface, made of a thin ``high-k'' dielectric, a smaller valley splitting is observed, adding further options to tune the valley splitting within a single device. |
| title | Wide Electrical Tunability of the Valley Splitting in a Doubly gated Silicon-on-Insulator Quantum Well |
| topic | Mesoscale and Nanoscale Physics |
| url | https://arxiv.org/abs/2509.02094 |