Error Detection Schemes for Barrett Reduction of CT-BU on FPGA in Post Quantum Cryptography

Fuente: arXiv

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Bibliographic Details
Main Authors:	Baidya, Paresh, Paul, Rourab, Srivastava, Vikas, Debnath, Sumit Kumar
Format:	Preprint
Published:	2025
Subjects:	Cryptography and Security Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2509.04070