Imagen de Portada

A Spatio-Temporal Graph Neural Networks Approach for Predicting Silent Data Corruption inducing Circuit-Level Faults

Fuente: arXiv

Guardado en:

Detalles Bibliográficos
Autores principales:	Wei, Shaoqi, Wang, Senling, Kai, Hiroshi, Higami, Yoshinobu, Ma, Ruijun, Ni, Tianming, Wen, Xiaoqing, Takahashi, Hiroshi
Formato:	Preprint
Publicado:	2025
Materias:	Machine Learning Hardware Architecture Emerging Technologies B.7.3
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

Ejemplares similares

AnalogToBi: Device-Level Analog Circuit Topology Generation via Bipartite Graph and Grammar Guided Decoding
por: Kim, Seungmin, et al.
Publicado: (2026)

Architecture-Level Modeling of Photonic Deep Neural Network Accelerators
por: Andrulis, Tanner, et al.
Publicado: (2024)

Fault-Free Analog Computing with Imperfect Hardware
por: Xu, Zhicheng, et al.
Publicado: (2025)

Fault Tolerant Design of IGZO-based Binary Search ADCs
por: Duarte, Paula Carolina Lozano, et al.
Publicado: (2026)

The Dawn of AI-Native EDA: Opportunities and Challenges of Large Circuit Models
por: Chen, Lei, et al.
Publicado: (2024)

STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration
por: Parekh, Varun Darshana, et al.
Publicado: (2025)

Length-Matching Routing for Programmable Photonic Circuits Using Best-First Strategy
por: Wang, Xiaoke, et al.
Publicado: (2025)

Monolithic 3D Integration for Null Convention Logic (NCL)-Based Asynchronous Circuits
por: Zhang, Xiameng, et al.
Publicado: (2026)

A Blueprint for Precise and Fault-Tolerant Analog Neural Networks
por: Demirkiran, Cansu, et al.
Publicado: (2023)

Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits
por: Chen, Yibo, et al.
Publicado: (2025)

PRACtical: Subarray-Level Counter Update and Bank-Level Recovery Isolation for Efficient PRAC Rowhammer Mitigation
por: Nazaraliyev, Ravan, et al.
Publicado: (2025)

Hybrid Temporal Computing for Lower Power Hardware Accelerators
por: Tasnim, Maliha, et al.
Publicado: (2024)

Device-Circuit Co-Design of Variation-Resilient Read and Write Drivers for Antiferromagnetic Tunnel Junction (AFMTJ) Memories
por: Choudhary, Yousuf, et al.
Publicado: (2026)

Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits
por: Pallavi, CH., et al.
Publicado: (2024)

CQ-CiM: Hardware-Aware Embedding Shaping for Robust CiM-Based Retrieval
por: Li, Xinzhao, et al.
Publicado: (2026)

Single-Cell Universal Logic-in-Memory Using 2T-nC FeRAM: An Area and Energy-Efficient Approach for Bulk Bitwise Computation
por: Biswas, Rudra, et al.
Publicado: (2025)

SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum-Flux-Parametron Superconducting Circuits
por: Xie, Yanyue, et al.
Publicado: (2024)

Pinball: A Cryogenic Predecoder for Surface Code Decoding Under Circuit-Level Noise
por: Knapen, Alexander, et al.
Publicado: (2025)

CXLRAMSim v1.0: System-Level Exploration of CXL Memory Expander Cards
por: Pathak, Karan, et al.
Publicado: (2026)

Exploring Liquid Neural Networks on Loihi-2
por: Pawlak, Wiktoria Agata, et al.
Publicado: (2024)

Bayes2IMC: In-Memory Computing for Bayesian Binary Neural Networks
por: Katti, Prabodh, et al.
Publicado: (2024)

Scalable Digital Compute-in-Memory Ising Machines for Robustness Verification of Binary Neural Networks
por: Vadlamani, Madhav, et al.
Publicado: (2026)

ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks
por: Sedaghatgoo, Ali, et al.
Publicado: (2024)

HAVEN: High-Bandwidth Flash Augmented Vector Engine for Large-Scale Approximate Nearest-Neighbor Search Acceleration
por: Hsu, Po-Kai, et al.
Publicado: (2026)

C3-VQA: Cryogenic Counter-based Co-processor for Variational Quantum Algorithms
por: Ueno, Yosuke, et al.
Publicado: (2024)

Probabilistic approximate optimization using single-photon avalanche diode arrays
por: Alswaidan, Ziyad, et al.
Publicado: (2026)

Learning-driven Physically-aware Large-scale Circuit Gate Sizing
por: Ye, Yuyang, et al.
Publicado: (2024)

Circuit decompositions and scheduling for neutral atom devices with limited local addressability
por: Nottingham, Natalia, et al.
Publicado: (2023)

ASDR: Exploiting Adaptive Sampling and Data Reuse for CIM-based Instant Neural Rendering
por: Liu, Fangxin, et al.
Publicado: (2025)

In-Situ Encryption of Single-Transistor Nonvolatile Memories without Density Loss
por: Ovy, Sanwar Ahmed, et al.
Publicado: (2025)

Robust Qubit Mapping Algorithm via Double-Source Optimal Routing on Large Quantum Circuits
por: Cheng, Chin-Yi, et al.
Publicado: (2022)

LLM-PRISM: Characterizing Silent Data Corruption from Permanent GPU Faults in LLM Training
por: Tyagi, Abhishek, et al.
Publicado: (2026)

A Novel Thermal Network Model and Electro-Thermal Coupling Study for NSFETs and CFETs Considering Thermal Crosstalk
por: Miao, Tianci, et al.
Publicado: (2025)

Frequency as Aperture: Enabling Embeddable Near-Field Sensing for 6G Wireless Radios
por: Ho, Pin-Han, et al.
Publicado: (2026)

PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
por: Chen, Zhiyu, et al.
Publicado: (2024)

Everything You Wanted to Know About Consumer Light Management in Smart Energy
por: Mohanty, Prajnyajit, et al.
Publicado: (2024)

Opportunities and Challenges for 3D Systems and Their Design
por: Emma, Philip, et al.
Publicado: (2025)

Sequencing on Silicon: AI SoC Design for Mobile Genomics at the Edge
por: Magierowski, Sebastian, et al.
Publicado: (2025)

Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
por: Chen, Guan-Cheng, et al.
Publicado: (2025)

SMART-WRITE: Adaptive Learning-based Write Energy Optimization for Phase Change Memory
por: Desai, Mahek, et al.
Publicado: (2025)