Hardware Acceleration in Portable MRIs: State of the Art and Future Prospects
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| Main Authors: | , , , , , |
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| Format: | Preprint |
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2025
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| _version_ | 1866915484114354176 |
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| author | Habsi, Omar Al Sali, Safa Mohammed Meribout, Anis Meribout, Mahmoud Almazrouei, Saif Seghier, Mohamed |
| author_facet | Habsi, Omar Al Sali, Safa Mohammed Meribout, Anis Meribout, Mahmoud Almazrouei, Saif Seghier, Mohamed |
| contents | There is a growing interest in portable MRI (pMRI) systems for point-of-care imaging, particularly in remote or resource-constrained environments. However, the computational complexity of pMRI, especially in image reconstruction and machine learning (ML) algorithms for enhanced imaging, presents significant challenges. Such challenges can be potentially addressed by harnessing hardware application solutions, though there is little focus in the current pMRI literature on hardware acceleration. This paper bridges that gap by reviewing recent developments in pMRI, emphasizing the role and impact of hardware acceleration to speed up image acquisition and reconstruction. Key technologies such as Graphics Processing Units (GPUs), Field-Programmable Gate Arrays (FPGAs), and Application-Specific Integrated Circuits (ASICs) offer excellent performance in terms of reconstruction speed and power consumption. This review also highlights the promise of AI-powered reconstruction, open low-field pMRI datasets, and innovative edge-based hardware solutions for the future of pMRI technology. Overall, hardware acceleration can enhance image quality, reduce power consumption, and increase portability for next-generation pMRI technology. To accelerate reproducible AI for portable MRI, we propose forming a Low-Field MRI Consortium and an evidence ladder (analytic/phantom validation, retrospective multi-center testing, prospective reader and non-inferiority trials) to provide standardized datasets, benchmarks, and regulator-ready testbeds. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2509_06365 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Hardware Acceleration in Portable MRIs: State of the Art and Future Prospects Habsi, Omar Al Sali, Safa Mohammed Meribout, Anis Meribout, Mahmoud Almazrouei, Saif Seghier, Mohamed Hardware Architecture There is a growing interest in portable MRI (pMRI) systems for point-of-care imaging, particularly in remote or resource-constrained environments. However, the computational complexity of pMRI, especially in image reconstruction and machine learning (ML) algorithms for enhanced imaging, presents significant challenges. Such challenges can be potentially addressed by harnessing hardware application solutions, though there is little focus in the current pMRI literature on hardware acceleration. This paper bridges that gap by reviewing recent developments in pMRI, emphasizing the role and impact of hardware acceleration to speed up image acquisition and reconstruction. Key technologies such as Graphics Processing Units (GPUs), Field-Programmable Gate Arrays (FPGAs), and Application-Specific Integrated Circuits (ASICs) offer excellent performance in terms of reconstruction speed and power consumption. This review also highlights the promise of AI-powered reconstruction, open low-field pMRI datasets, and innovative edge-based hardware solutions for the future of pMRI technology. Overall, hardware acceleration can enhance image quality, reduce power consumption, and increase portability for next-generation pMRI technology. To accelerate reproducible AI for portable MRI, we propose forming a Low-Field MRI Consortium and an evidence ladder (analytic/phantom validation, retrospective multi-center testing, prospective reader and non-inferiority trials) to provide standardized datasets, benchmarks, and regulator-ready testbeds. |
| title | Hardware Acceleration in Portable MRIs: State of the Art and Future Prospects |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2509.06365 |