Development of BPM electronics for PIP-II at Fermilab
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arXiv
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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866911163257716736 |
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| author | Liu, Shengli Eddy, Nathan Semenov, A. Fellenz, Brian |
| author_facet | Liu, Shengli Eddy, Nathan Semenov, A. Fellenz, Brian |
| contents | This paper presents the uTCA4.0-based BPM electronics for PIP-II, featuring four 250 MSPS ADCs and a Xilinx UltraScale+ MPSoC FPGA with 10 GbE uplink. Design elements include signal conditioning, clock, and thermal management. The FPGA performs signal processing, time tagging, digital down-conversion, and phase drift compensation. Position and phase resolution, and thermal stability - is validated through dedicated testing. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2509_15388 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Development of BPM electronics for PIP-II at Fermilab Liu, Shengli Eddy, Nathan Semenov, A. Fellenz, Brian Accelerator Physics This paper presents the uTCA4.0-based BPM electronics for PIP-II, featuring four 250 MSPS ADCs and a Xilinx UltraScale+ MPSoC FPGA with 10 GbE uplink. Design elements include signal conditioning, clock, and thermal management. The FPGA performs signal processing, time tagging, digital down-conversion, and phase drift compensation. Position and phase resolution, and thermal stability - is validated through dedicated testing. |
| title | Development of BPM electronics for PIP-II at Fermilab |
| topic | Accelerator Physics |
| url | https://arxiv.org/abs/2509.15388 |