VerilogMonkey: Exploring Parallel Scaling for Automated Verilog Code Generation with LLMs
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arXiv
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| Main Authors: | , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866908548996268032 |
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| author | Niu, Juxin Du, Yuxin Niu, Dan Wang, Xi Jiang, Zhe Guan, Nan |
| author_facet | Niu, Juxin Du, Yuxin Niu, Dan Wang, Xi Jiang, Zhe Guan, Nan |
| contents | We present VerilogMonkey, an empirical study of parallel scaling for the under-explored task of automated Verilog generation. Parallel scaling improves LLM performance by sampling many outputs in parallel. Across multiple benchmarks and mainstream LLMs, we find that scaling to hundreds of samples is cost-effective in both time and money and, even without any additional enhancements such as post-training or agentic methods, surpasses prior results on LLM-based Verilog generation. We further dissect why parallel scaling delivers these gains and show how output randomness in LLMs affects its effectiveness. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2509_16246 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | VerilogMonkey: Exploring Parallel Scaling for Automated Verilog Code Generation with LLMs Niu, Juxin Du, Yuxin Niu, Dan Wang, Xi Jiang, Zhe Guan, Nan Programming Languages Hardware Architecture We present VerilogMonkey, an empirical study of parallel scaling for the under-explored task of automated Verilog generation. Parallel scaling improves LLM performance by sampling many outputs in parallel. Across multiple benchmarks and mainstream LLMs, we find that scaling to hundreds of samples is cost-effective in both time and money and, even without any additional enhancements such as post-training or agentic methods, surpasses prior results on LLM-based Verilog generation. We further dissect why parallel scaling delivers these gains and show how output randomness in LLMs affects its effectiveness. |
| title | VerilogMonkey: Exploring Parallel Scaling for Automated Verilog Code Generation with LLMs |
| topic | Programming Languages Hardware Architecture |
| url | https://arxiv.org/abs/2509.16246 |