Device-scaling constraints imposed by the van der Waals gap formed in two-dimensional materials
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arXiv
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| Format: | Preprint |
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2025
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| _version_ | 1866915951289565184 |
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| author | Pourfath, Mahdi Grasser, Tibor |
| author_facet | Pourfath, Mahdi Grasser, Tibor |
| contents | Transistor miniaturization requires controlling gate leakage through ultrathin dielectrics and minimizing source/drain contact resistance. Although two-dimensional (2D) semiconductors offer excellent electrostatic control, their interfaces with gate dielectrics and contact metals often form a van der Waals (vdW) gap that impacts device performance and acts as a tunneling barrier with a low-dielectric constant. While this reduces dielectric leakage, it increases metal-channel contact resistance and introduces a parasitic series capacitance to the gate. We quantified the trade-off between leakage suppression and electrostatic and contact-resistance scaling limits. As a result, many insulators fail to meet scaling targets, and metal-channel contacts fall short of required resistances. Zipper-like interfaces, where quasi-covalent bonding removes the vdW gap without creating dangling bonds, offer a path toward ultrascaled transistor designs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2509_17617 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Device-scaling constraints imposed by the van der Waals gap formed in two-dimensional materials Pourfath, Mahdi Grasser, Tibor Mesoscale and Nanoscale Physics Transistor miniaturization requires controlling gate leakage through ultrathin dielectrics and minimizing source/drain contact resistance. Although two-dimensional (2D) semiconductors offer excellent electrostatic control, their interfaces with gate dielectrics and contact metals often form a van der Waals (vdW) gap that impacts device performance and acts as a tunneling barrier with a low-dielectric constant. While this reduces dielectric leakage, it increases metal-channel contact resistance and introduces a parasitic series capacitance to the gate. We quantified the trade-off between leakage suppression and electrostatic and contact-resistance scaling limits. As a result, many insulators fail to meet scaling targets, and metal-channel contacts fall short of required resistances. Zipper-like interfaces, where quasi-covalent bonding removes the vdW gap without creating dangling bonds, offer a path toward ultrascaled transistor designs. |
| title | Device-scaling constraints imposed by the van der Waals gap formed in two-dimensional materials |
| topic | Mesoscale and Nanoscale Physics |
| url | https://arxiv.org/abs/2509.17617 |