:: Library Catalog

Cover Image

Saved in:

Bibliographic Details
Main Author:	Bascuñán, Fernanda Zapata
Format:	Preprint
Published:	2025
Subjects:	Machine Learning Hardware Architecture
Online Access:	https://arxiv.org/abs/2509.25382
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

smallNet: Implementation of a convolutional layer in tiny FPGAs
by: Bascuñán, Fernanda Zapata, et al.
Published: (2025)

CircuitVAE: Efficient and Scalable Latent Circuit Optimization
by: Song, Jialin, et al.
Published: (2024)

MoE-GPS: Guidlines for Prediction Strategy for Dynamic Expert Duplication in MoE Load Balancing
by: Ma, Haiyue, et al.
Published: (2025)

SoberDSE: Sample-Efficient Design Space Exploration via Learning-Based Algorithm Selection
by: Xu, Lei, et al.
Published: (2026)

BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration
by: Chen, Yuzong, et al.
Published: (2024)

AxMoE: Characterizing the Impact of Approximate Multipliers on Mixture-of-Experts DNN Architectures
by: Shende, Omkar B, et al.
Published: (2026)

DS-CIM: Digital Stochastic Computing-In-Memory Featuring Accurate OR-Accumulation via Sample Region Remapping for Edge AI Models
by: Shao, Kunming, et al.
Published: (2026)

From Principles to Practice: A Systematic Study of LLM Serving on Multi-core NPUs
by: Zhu, Tianhao, et al.
Published: (2025)

Boolean-aware Boolean Circuit Classification: A Comprehensive Study on Graph Neural Network
by: Ni, Liwei, et al.
Published: (2024)

FiCABU: A Fisher-Based, Context-Adaptive Machine Unlearning Processor for Edge AI
by: Cho, Eun-Su, et al.
Published: (2025)

CapBench: A Multi-PDK Dataset for Machine-Learning-Based Post-Layout Capacitance Extraction
by: Rodriguez, Hector R., et al.
Published: (2026)

An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks
by: Sekonji, Mohammad Javad, et al.
Published: (2026)

Graph Neural Networks Based Analog Circuit Link Prediction
by: Pan, Guanyuan, et al.
Published: (2025)

PiC-BNN: A 128-kbit 65 nm Processing-in-CAM-Based End-to-End Binary Neural Network Accelerator
by: Harary, Yuval, et al.
Published: (2026)

DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators
by: Hong, Charles, et al.
Published: (2025)

An Efficient Data Reuse with Tile-Based Adaptive Stationary for Transformer Accelerators
by: Li, Tseng-Jen, et al.
Published: (2025)

On Robustness and Generalization of ML-Based Congestion Predictors to Valid and Imperceptible Perturbations
by: Holtz, Chester, et al.
Published: (2024)

An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViT
by: Shao, Haikuo, et al.
Published: (2024)

A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface
by: Yin, Guodong, et al.
Published: (2022)

EEsizer: LLM-Based AI Agent for Sizing of Analog and Mixed Signal Circuit
by: Liu, Chang, et al.
Published: (2025)

InstantFT: An FPGA-Based Runtime Subsecond Fine-tuning of CNN Models
by: Sugiura, Keisuke, et al.
Published: (2025)

Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators
by: Taheri, Mahdi, et al.
Published: (2024)

An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes
by: Wang, Miaoxin, et al.
Published: (2024)

ArtNet: Hierarchical Clustering-Based Artificial Netlist Generator for ML and DTCO Application
by: Kang, Andrew B. Kahng. Seokhyeong, et al.
Published: (2025)

MCEL: Margin-Based Cross-Entropy Loss for Error-Tolerant Quantized Neural Networks
by: Yayla, Mikail, et al.
Published: (2026)

RTLSeek: Boosting the LLM-Based RTL Generation with Multi-Stage Diversity-Oriented Reinforcement Learning
by: Zhang, Xinyu, et al.
Published: (2026)

Cell Library Characterization for Composite Current Source Models Based on Gaussian Process Regression and Active Learning
by: Bai, Tao, et al.
Published: (2025)

xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems
by: Rutishauser, Georg, et al.
Published: (2024)

Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format
by: Fang, Chao, et al.
Published: (2024)

GCL-Sampler: Discovering Kernel Similarity for Sampled GPU Simulation via Graph Contrastive Learning
by: Wang, Jiaqi, et al.
Published: (2026)

SwiftChannel: Algorithm-Hardware Co-Design for Deep Learning-Based 5G Channel Estimation
by: Lyu, Shengzhe, et al.
Published: (2026)

MoNDE: Mixture of Near-Data Experts for Large-Scale Sparse Models
by: Kim, Taehyun, et al.
Published: (2024)

ROSA: Robust and Energy-Efficient Microring-Based Optical Neural Networks via Optical Shift-and-Add and Layer-Wise Hybrid Mapping
by: Zhang, Huifan, et al.
Published: (2026)

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC
by: Ribeiro, Lucas Grativol, et al.
Published: (2024)

FlashMoE: Fast Distributed MoE in a Single Kernel
by: Aimuyo, Osayamen Jonathan, et al.
Published: (2025)

Pre-gated MoE: An Algorithm-System Co-Design for Fast and Scalable Mixture-of-Expert Inference
by: Hwang, Ranggi, et al.
Published: (2023)

Onboard Optimization and Learning: A Survey
by: Pavel, Monirul Islam, et al.
Published: (2025)

Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving
by: Pan, Yue, et al.
Published: (2025)

iEEG Seizure Detection with a Sparse Hyperdimensional Computing Accelerator
by: Cuyckens, Stef, et al.
Published: (2025)

A Joint Learning Approach to Hardware Caching and Prefetching
by: Yuan, Samuel, et al.
Published: (2025)