Guardado en:
| Autores principales: | Zhang, Jingyao, Park, Jaewoo, Lee, Jongeun, Sadredini, Elaheh |
|---|---|
| Formato: | Preprint |
| Publicado: |
2025
|
| Materias: | |
| Acceso en línea: | https://arxiv.org/abs/2509.25853 |
| Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Ejemplares similares
CryptoSRAM: Enabling High-Throughput Cryptography on MCUs via In-SRAM Computing
por: Zhang, Jingyao, et al.
Publicado: (2025)
por: Zhang, Jingyao, et al.
Publicado: (2025)
No One-Size-Fits-All: A Workload-Driven Characterization of Bit-Parallel vs. Bit-Serial Data Layouts for Processing-using-Memory
por: Zhang, Jingyao, et al.
Publicado: (2025)
por: Zhang, Jingyao, et al.
Publicado: (2025)
A Near-Cache Architectural Framework for Cryptographic Computing
por: Zhang, Jingyao, et al.
Publicado: (2025)
por: Zhang, Jingyao, et al.
Publicado: (2025)
IMAGine: An In-Memory Accelerated GEMV Engine Overlay
por: Kabir, MD Arafat, et al.
Publicado: (2024)
por: Kabir, MD Arafat, et al.
Publicado: (2024)
Hardware Generation and Exploration of Lookup Table-Based Accelerators for 1.58-bit LLM Inference
por: Geens, Robin, et al.
Publicado: (2026)
por: Geens, Robin, et al.
Publicado: (2026)
Balanced Data Placement for GEMV Acceleration with Processing-In-Memory
por: Ibrahim, Mohamed Assem, et al.
Publicado: (2024)
por: Ibrahim, Mohamed Assem, et al.
Publicado: (2024)
T-MAN: Enabling End-to-End Low-Bit LLM Inference on NPUs via Unified Table Lookup
por: Wei, Jianyu, et al.
Publicado: (2025)
por: Wei, Jianyu, et al.
Publicado: (2025)
DAISM: Digital Approximate In-SRAM Multiplier-based Accelerator for DNN Training and Inference
por: Sonnino, Lorenzo, et al.
Publicado: (2023)
por: Sonnino, Lorenzo, et al.
Publicado: (2023)
Modular SAIL: dream or reality?
por: Kourzanov, Petr, et al.
Publicado: (2025)
por: Kourzanov, Petr, et al.
Publicado: (2025)
Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation
por: Tagata, Hiroto, et al.
Publicado: (2025)
por: Tagata, Hiroto, et al.
Publicado: (2025)
AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator
por: Xue, Chenhao, et al.
Publicado: (2026)
por: Xue, Chenhao, et al.
Publicado: (2026)
NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing
por: Heo, Guseul, et al.
Publicado: (2024)
por: Heo, Guseul, et al.
Publicado: (2024)
A Review of SRAM-based Compute-in-Memory Circuits
por: Yoshioka, Kentaro, et al.
Publicado: (2024)
por: Yoshioka, Kentaro, et al.
Publicado: (2024)
SRAM-PG: Power Delivery Network Benchmarks from SRAM Circuits
por: Shen, Shan, et al.
Publicado: (2024)
por: Shen, Shan, et al.
Publicado: (2024)
CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device
por: and, Yan-Cheng Guo, et al.
Publicado: (2025)
por: and, Yan-Cheng Guo, et al.
Publicado: (2025)
ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits
por: Zhang, Wenlun, et al.
Publicado: (2024)
por: Zhang, Wenlun, et al.
Publicado: (2024)
Ouroboros: Wafer-Scale SRAM CIM with Token-Grained Pipelining for Large Language Model Inference
por: Liu, Yiqi, et al.
Publicado: (2026)
por: Liu, Yiqi, et al.
Publicado: (2026)
TeLLMe v2: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs
por: Qiao, Ye, et al.
Publicado: (2025)
por: Qiao, Ye, et al.
Publicado: (2025)
TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference
por: Klhufek, Jan, et al.
Publicado: (2026)
por: Klhufek, Jan, et al.
Publicado: (2026)
CIM-Tuner: Balancing the Compute and Storage Capacity of SRAM-CIM Accelerator via Hardware-mapping Co-exploration
por: Chen, Jinwu, et al.
Publicado: (2026)
por: Chen, Jinwu, et al.
Publicado: (2026)
Table-Lookup MAC: Scalable Processing of Quantised Neural Networks in FPGA Soft Logic
por: Gerlinghoff, Daniel, et al.
Publicado: (2024)
por: Gerlinghoff, Daniel, et al.
Publicado: (2024)
CIMple: Standard-cell SRAM-based CIM with LUT-based split softmax for attention acceleration
por: Ahn, Bas, et al.
Publicado: (2026)
por: Ahn, Bas, et al.
Publicado: (2026)
ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM
por: Ku, Jonathan, et al.
Publicado: (2024)
por: Ku, Jonathan, et al.
Publicado: (2024)
CIMinus: Empowering Sparse DNN Workloads Modeling and Exploration on SRAM-based CIM Architectures
por: Qi, Yingjie, et al.
Publicado: (2025)
por: Qi, Yingjie, et al.
Publicado: (2025)
A PVT-Resilient Subthreshold SRAM-Based In-Memory Computing Accelerator with In-Situ Regulation for Energy-Efficient Spiking Neural Networks
por: Kao, Shih-Hang, et al.
Publicado: (2026)
por: Kao, Shih-Hang, et al.
Publicado: (2026)
SparseLUT: Sparse Connectivity Optimization for Lookup Table-based Deep Neural Networks
por: Lou, Binglei, et al.
Publicado: (2025)
por: Lou, Binglei, et al.
Publicado: (2025)
LaMoS: Enabling Efficient Large Number Modular Multiplication through SRAM-based CiM Acceleration
por: Li, Haomin, et al.
Publicado: (2025)
por: Li, Haomin, et al.
Publicado: (2025)
Accelerating Seed Location Filtering in DNA Read Mapping Using a Commercial Compute-in-SRAM Architecture
por: Golden, Courtney, et al.
Publicado: (2024)
por: Golden, Courtney, et al.
Publicado: (2024)
FIGLUT: An Energy-Efficient Accelerator Design for FP-INT GEMM Using Look-Up Tables
por: Park, Gunho, et al.
Publicado: (2025)
por: Park, Gunho, et al.
Publicado: (2025)
SpeedLLM: An FPGA Co-design of Large Language Model Inference Accelerator
por: Wang, Peipei, et al.
Publicado: (2025)
por: Wang, Peipei, et al.
Publicado: (2025)
IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System
por: Seo, Minseok, et al.
Publicado: (2024)
por: Seo, Minseok, et al.
Publicado: (2024)
Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables
por: Ghosh, Subhadip, et al.
Publicado: (2025)
por: Ghosh, Subhadip, et al.
Publicado: (2025)
LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning Accelerator
por: Li, Guoyu, et al.
Publicado: (2025)
por: Li, Guoyu, et al.
Publicado: (2025)
Mapping Space Exploration for Multi-Chiplet Accelerators Targeting LLM Inference Serving Workloads
por: Li, Boyu, et al.
Publicado: (2025)
por: Li, Boyu, et al.
Publicado: (2025)
A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network
por: Jiang, Aojie, et al.
Publicado: (2026)
por: Jiang, Aojie, et al.
Publicado: (2026)
Ultra8T: A Sub-Threshold 8T SRAM with Leakage Detection
por: Shen, Shan, et al.
Publicado: (2023)
por: Shen, Shan, et al.
Publicado: (2023)
Characterizing and Optimizing Realistic Workloads on a Commercial Compute-in-SRAM Device
por: Zhang, Niansong, et al.
Publicado: (2025)
por: Zhang, Niansong, et al.
Publicado: (2025)
VitaLLM: A Versatile and Tiny Accelerator for Mixed-Precision LLM Inference on Edge Devices
por: Lin, Zi-Wei, et al.
Publicado: (2026)
por: Lin, Zi-Wei, et al.
Publicado: (2026)
OpenYield: An Open-Source SRAM Yield Analysis and Optimization Benchmark Suite
por: Shen, Shan, et al.
Publicado: (2025)
por: Shen, Shan, et al.
Publicado: (2025)
OpenACM: An Open-Source SRAM-Based Approximate CiM Compiler
por: Zhou, Yiqi, et al.
Publicado: (2026)
por: Zhou, Yiqi, et al.
Publicado: (2026)
Ejemplares similares
-
CryptoSRAM: Enabling High-Throughput Cryptography on MCUs via In-SRAM Computing
por: Zhang, Jingyao, et al.
Publicado: (2025) -
No One-Size-Fits-All: A Workload-Driven Characterization of Bit-Parallel vs. Bit-Serial Data Layouts for Processing-using-Memory
por: Zhang, Jingyao, et al.
Publicado: (2025) -
A Near-Cache Architectural Framework for Cryptographic Computing
por: Zhang, Jingyao, et al.
Publicado: (2025) -
IMAGine: An In-Memory Accelerated GEMV Engine Overlay
por: Kabir, MD Arafat, et al.
Publicado: (2024) -
Hardware Generation and Exploration of Lookup Table-Based Accelerators for 1.58-bit LLM Inference
por: Geens, Robin, et al.
Publicado: (2026)