MUSS-TI: Multi-level Shuttle Scheduling for Large-Scale Entanglement Module Linked Trapped-Ion
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arXiv
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| Format: | Preprint |
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2025
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| _version_ | 1866914067681116160 |
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| author | Wu, Xian Zhu, Chenghong Wang, Jingbo Wang, Xin |
| author_facet | Wu, Xian Zhu, Chenghong Wang, Jingbo Wang, Xin |
| contents | Trapped-ion computing is a leading architecture in the pursuit of scalable and high fidelity quantum systems. Modular quantum architectures based on photonic interconnects offer a promising path for scaling trapped ion devices. In this design, multiple Quantum Charge Coupled Device (QCCD) units are interconnected through entanglement module. Each unit features a multi-zone layout that separates functionalities into distinct areas, enabling more efficient and flexible quantum operations. However, achieving efficient and scalable compilation of quantum circuits in such entanglement module linked Quantum Charge-Coupled Device (EML-QCCD) remains a primary challenge for practical quantum applications.
In this work, we propose a scalable compiler tailored for large-scale trapped-ion architectures, with the goal of reducing the shuttling overhead inherent in EML-QCCD devices. MUSS-TI introduces a multi-level scheduling approach inspired by multi-level memory scheduling in classical computing. This method is designed to be aware of the distinct roles of different zones and to minimize the number of shuttling operations required in EML-QCCD systems. We demonstrate that EML-QCCD architectures are well-suited for executing large-scale applications. Our evaluation shows that MUSS-TI reduces shuttle operations by 41.74% for applications with 30-32 qubits, and by an average of 73.38% and 59.82% for applications with 117-128 qubits and 256-299 qubits, respectively. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2509_25988 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | MUSS-TI: Multi-level Shuttle Scheduling for Large-Scale Entanglement Module Linked Trapped-Ion Wu, Xian Zhu, Chenghong Wang, Jingbo Wang, Xin Quantum Physics Hardware Architecture Trapped-ion computing is a leading architecture in the pursuit of scalable and high fidelity quantum systems. Modular quantum architectures based on photonic interconnects offer a promising path for scaling trapped ion devices. In this design, multiple Quantum Charge Coupled Device (QCCD) units are interconnected through entanglement module. Each unit features a multi-zone layout that separates functionalities into distinct areas, enabling more efficient and flexible quantum operations. However, achieving efficient and scalable compilation of quantum circuits in such entanglement module linked Quantum Charge-Coupled Device (EML-QCCD) remains a primary challenge for practical quantum applications. In this work, we propose a scalable compiler tailored for large-scale trapped-ion architectures, with the goal of reducing the shuttling overhead inherent in EML-QCCD devices. MUSS-TI introduces a multi-level scheduling approach inspired by multi-level memory scheduling in classical computing. This method is designed to be aware of the distinct roles of different zones and to minimize the number of shuttling operations required in EML-QCCD systems. We demonstrate that EML-QCCD architectures are well-suited for executing large-scale applications. Our evaluation shows that MUSS-TI reduces shuttle operations by 41.74% for applications with 30-32 qubits, and by an average of 73.38% and 59.82% for applications with 117-128 qubits and 256-299 qubits, respectively. |
| title | MUSS-TI: Multi-level Shuttle Scheduling for Large-Scale Entanglement Module Linked Trapped-Ion |
| topic | Quantum Physics Hardware Architecture |
| url | https://arxiv.org/abs/2509.25988 |