Integrated Security Mechanisms for Weight Protection in Memristive Crossbar Arrays

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Hauptverfasser: Rahman, Muhammad Faheemur, Burleson, Wayne
Format: Preprint
Veröffentlicht: 2025
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author Rahman, Muhammad Faheemur
Burleson, Wayne
author_facet Rahman, Muhammad Faheemur
Burleson, Wayne
contents Memristive crossbar arrays enable in-memory computing by performing parallel analog computations directly within memory, making them well-suited for machine learning, neural networks, and neuromorphic systems. However, despite their advantages, non-volatile memristors are vulnerable to security threats (such as adversarial extraction of stored weights when the hardware is compromised. Protecting these weights is essential since they represent valuable intellectual property resulting from lengthy and costly training processes using large, often proprietary, datasets. As a solution we propose two security mechanisms: Keyed Permutor and Watermark Protection Columns; where both safeguard critical weights and establish verifiable ownership (even in cases of data leakage). Our approach integrates efficiently with existing memristive crossbar architectures without significant design modifications. Simulations across 45nm, 22nm, and 7nm CMOS nodes, using a realistic interconnect model and a large RF dataset, show that both mechanisms offer robust protection with under 10% overhead in area, delay and power. We also present initial experiments employing the widely known MNIST dataset; further highlighting the feasibility of securing memristive in-memory computing systems with minimal performance trade-offs.
format Preprint
id arxiv_https___arxiv_org_abs_2510_01350
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Integrated Security Mechanisms for Weight Protection in Memristive Crossbar Arrays
Rahman, Muhammad Faheemur
Burleson, Wayne
Cryptography and Security
Hardware Architecture
Emerging Technologies
Neural and Evolutionary Computing
Systems and Control
Memristive crossbar arrays enable in-memory computing by performing parallel analog computations directly within memory, making them well-suited for machine learning, neural networks, and neuromorphic systems. However, despite their advantages, non-volatile memristors are vulnerable to security threats (such as adversarial extraction of stored weights when the hardware is compromised. Protecting these weights is essential since they represent valuable intellectual property resulting from lengthy and costly training processes using large, often proprietary, datasets. As a solution we propose two security mechanisms: Keyed Permutor and Watermark Protection Columns; where both safeguard critical weights and establish verifiable ownership (even in cases of data leakage). Our approach integrates efficiently with existing memristive crossbar architectures without significant design modifications. Simulations across 45nm, 22nm, and 7nm CMOS nodes, using a realistic interconnect model and a large RF dataset, show that both mechanisms offer robust protection with under 10% overhead in area, delay and power. We also present initial experiments employing the widely known MNIST dataset; further highlighting the feasibility of securing memristive in-memory computing systems with minimal performance trade-offs.
title Integrated Security Mechanisms for Weight Protection in Memristive Crossbar Arrays
topic Cryptography and Security
Hardware Architecture
Emerging Technologies
Neural and Evolutionary Computing
Systems and Control
url https://arxiv.org/abs/2510.01350