Sequencing on Silicon: AI SoC Design for Mobile Genomics at the Edge

Fuente: arXiv
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Autores principales: Magierowski, Sebastian, Wu, Zhongpan, Beyene, Abel, Hammad, Karim
Formato: Preprint
Publicado: 2025
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author Magierowski, Sebastian
Wu, Zhongpan
Beyene, Abel
Hammad, Karim
author_facet Magierowski, Sebastian
Wu, Zhongpan
Beyene, Abel
Hammad, Karim
contents Miniature DNA sequencing hardware has begun to succeed in mobile contexts, driving demand for efficient machine learning at the edge. This domain leverages deep learning techniques familiar from speech and time-series analysis for both low-level signal processing and high-level genomic interpretation. Unlike audio, however, nanopore sequencing presents raw data rates over 100X higher, requiring more aggressive compute and memory handling. In this paper, we present a CMOS system-on-chip (SoC) designed for mobile genetic analysis. Our approach combines a multi-core RISC-V processor with tightly coupled accelerators for deep learning and bioinformatics. A hardware/software co-design strategy enables energy-efficient operation across a heterogeneous compute fabric, targeting real-time, on-device genome analysis. This work exemplifies the integration of deep learning, edge computing, and domain-specific hardware to advance next-generation mobile genomics.
format Preprint
id arxiv_https___arxiv_org_abs_2510_09339
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Sequencing on Silicon: AI SoC Design for Mobile Genomics at the Edge
Magierowski, Sebastian
Wu, Zhongpan
Beyene, Abel
Hammad, Karim
Hardware Architecture
Emerging Technologies
Miniature DNA sequencing hardware has begun to succeed in mobile contexts, driving demand for efficient machine learning at the edge. This domain leverages deep learning techniques familiar from speech and time-series analysis for both low-level signal processing and high-level genomic interpretation. Unlike audio, however, nanopore sequencing presents raw data rates over 100X higher, requiring more aggressive compute and memory handling. In this paper, we present a CMOS system-on-chip (SoC) designed for mobile genetic analysis. Our approach combines a multi-core RISC-V processor with tightly coupled accelerators for deep learning and bioinformatics. A hardware/software co-design strategy enables energy-efficient operation across a heterogeneous compute fabric, targeting real-time, on-device genome analysis. This work exemplifies the integration of deep learning, edge computing, and domain-specific hardware to advance next-generation mobile genomics.
title Sequencing on Silicon: AI SoC Design for Mobile Genomics at the Edge
topic Hardware Architecture
Emerging Technologies
url https://arxiv.org/abs/2510.09339