IntrinTrans: LLM-based Intrinsic Code Translator for RISC-V Vector
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arXiv
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| Main Authors: | , , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866918412098207744 |
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| author | Han, Liutong Tan, Zhiyuan Zhang, Hongbin Wang, Pengcheng Kang, Chu Xing, Mingjie Wu, Yanjun |
| author_facet | Han, Liutong Tan, Zhiyuan Zhang, Hongbin Wang, Pengcheng Kang, Chu Xing, Mingjie Wu, Yanjun |
| contents | The use of intrinsic functions to leverage hardware-specific capabilities is a crucial approach for optimizing library performance. Many mainstream libraries implement a large number of vectorized algorithms on Arm or x86 SIMD (Single-Instruction, Multiple-Data) intrinsic functions. Translating existing vectorized intrinsic code into the intrinsics of an emerging architecture is a practical and effective approach. However, current cross-architecture translation largely relies on manual rewriting or rule-based mapping methods, which are both time-consuming and prone to errors. We present \texttt{IntrinTrans}, a LLM-based agent that utilizes compile-and-test feedback to translate intrinsic code across architectures automatically, and further optimizes the generated intrinsics using register-usage information derived from liveness analysis. To evaluate the effectiveness of our method, we used \texttt{IntrinTrans} to translate the open-source benchmark from Arm Neon Intrinsic to the emerging RISC-V Vector (RVV) Intrinsic implementation and compared its performance with that of the native RVV implementation. Our experiments show that advanced LLMs can generate semantically correct RVV Intrinsic functions with only a finite number of iterations. Depending on the base LLMs, the pass rate ranges from 47% to 100%, achieving performance similar to the native implementation (0.85x to 1.28x). |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2510_10119 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | IntrinTrans: LLM-based Intrinsic Code Translator for RISC-V Vector Han, Liutong Tan, Zhiyuan Zhang, Hongbin Wang, Pengcheng Kang, Chu Xing, Mingjie Wu, Yanjun Software Engineering The use of intrinsic functions to leverage hardware-specific capabilities is a crucial approach for optimizing library performance. Many mainstream libraries implement a large number of vectorized algorithms on Arm or x86 SIMD (Single-Instruction, Multiple-Data) intrinsic functions. Translating existing vectorized intrinsic code into the intrinsics of an emerging architecture is a practical and effective approach. However, current cross-architecture translation largely relies on manual rewriting or rule-based mapping methods, which are both time-consuming and prone to errors. We present \texttt{IntrinTrans}, a LLM-based agent that utilizes compile-and-test feedback to translate intrinsic code across architectures automatically, and further optimizes the generated intrinsics using register-usage information derived from liveness analysis. To evaluate the effectiveness of our method, we used \texttt{IntrinTrans} to translate the open-source benchmark from Arm Neon Intrinsic to the emerging RISC-V Vector (RVV) Intrinsic implementation and compared its performance with that of the native RVV implementation. Our experiments show that advanced LLMs can generate semantically correct RVV Intrinsic functions with only a finite number of iterations. Depending on the base LLMs, the pass rate ranges from 47% to 100%, achieving performance similar to the native implementation (0.85x to 1.28x). |
| title | IntrinTrans: LLM-based Intrinsic Code Translator for RISC-V Vector |
| topic | Software Engineering |
| url | https://arxiv.org/abs/2510.10119 |