Design and simulation of a 4H-SiC low gain avalanche diode with trench-isolation
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arXiv
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| Autores principales: | , , , , , , , , |
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| Formato: | Preprint |
| Publicado: |
2025
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| _version_ | 1866912652143362048 |
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| author | Onder, Sebastian Gaggl, Philipp Burin, Jürgen Gsponer, Andreas Knopf, Matthias Waid, Simon Moffat, Neil Pellegrini, Giulio Bergauer, Thomas |
| author_facet | Onder, Sebastian Gaggl, Philipp Burin, Jürgen Gsponer, Andreas Knopf, Matthias Waid, Simon Moffat, Neil Pellegrini, Giulio Bergauer, Thomas |
| contents | We present the design and simulation of a 30 $\mathrm{μm}$ thick 4H-SiC Low Gain Avalanche Diode (LGAD) optimized for high-voltage operation. A 2.4 $\mathrm{μm}$ thick epitaxially grown gain layer enables controlled internal amplification up to 1 kV reverse bias, while maintaining full depletion below 500 V. Electrical characteristics, including I-V, C-V, and gain behavior, were simulated in Synopsys Sentaurus Technology Computer-Aided Design (TCAD) using a quasi-1D geometry and verified across process-related variations in gain layer parameters. To ensure high-voltage stability and proper edge termination, a guard structure combining deep etched trenches and deep $p^+$ junction termination extension (JTE) implants was designed. TCAD simulations varying the guard structure dimensions yielded an optimized design with a breakdown voltage above 2.4 kV. A corresponding wafer run is currently processed at IMB-CNM, Barcelona. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2510_14531 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Design and simulation of a 4H-SiC low gain avalanche diode with trench-isolation Onder, Sebastian Gaggl, Philipp Burin, Jürgen Gsponer, Andreas Knopf, Matthias Waid, Simon Moffat, Neil Pellegrini, Giulio Bergauer, Thomas Instrumentation and Detectors We present the design and simulation of a 30 $\mathrm{μm}$ thick 4H-SiC Low Gain Avalanche Diode (LGAD) optimized for high-voltage operation. A 2.4 $\mathrm{μm}$ thick epitaxially grown gain layer enables controlled internal amplification up to 1 kV reverse bias, while maintaining full depletion below 500 V. Electrical characteristics, including I-V, C-V, and gain behavior, were simulated in Synopsys Sentaurus Technology Computer-Aided Design (TCAD) using a quasi-1D geometry and verified across process-related variations in gain layer parameters. To ensure high-voltage stability and proper edge termination, a guard structure combining deep etched trenches and deep $p^+$ junction termination extension (JTE) implants was designed. TCAD simulations varying the guard structure dimensions yielded an optimized design with a breakdown voltage above 2.4 kV. A corresponding wafer run is currently processed at IMB-CNM, Barcelona. |
| title | Design and simulation of a 4H-SiC low gain avalanche diode with trench-isolation |
| topic | Instrumentation and Detectors |
| url | https://arxiv.org/abs/2510.14531 |