Saved in:
Bibliographic Details
Main Authors: Cano, Alejandro, Camarero, Cristóbal, Martínez, Carmen, Beivide, Ramón
Format: Preprint
Published: 2025
Subjects:
Online Access:https://arxiv.org/abs/2510.14730
Tags: Add Tag
No Tags, Be the first to tag this record!
_version_ 1866911215174811648
author Cano, Alejandro
Camarero, Cristóbal
Martínez, Carmen
Beivide, Ramón
author_facet Cano, Alejandro
Camarero, Cristóbal
Martínez, Carmen
Beivide, Ramón
contents High-radix, low-diameter networks like HyperX and Dragonfly use a Full-mesh core, and rely on multiple virtual channels (VCs) to avoid packet deadlocks in adaptive routing. However, VCs introduce significant overhead in the switch in terms of area, power, and design complexity, limiting the switch scalability. This paper starts by revisiting VC-less routing through link ordering schemes in Full-mesh networks, which offer implementation simplicity but suffer from performance degradation under adversarial traffic. Thus, to overcome these challenges, we propose TERA (Topology-Embedded Routing Algorithm), a novel routing algorithm which employs an embedded physical subnetwork to provide deadlock-free non-minimal paths without using VCs. In a Full-mesh network, TERA outperforms link ordering routing algorithms by 80% when dealing with adversarial traffic, and up to 100% in application kernels. Furthermore, compared to other VC-based approaches, it reduces buffer requirements by 50%, while maintaining comparable latency and throughput. Lastly, early results from a 2D-HyperX evaluation show that TERA outperforms state-of-the-art algorithms that use the same number of VCs, achieving performance improvements of up to 32%.
format Preprint
id arxiv_https___arxiv_org_abs_2510_14730
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Deadlock-free routing for Full-mesh networks without using Virtual Channels
Cano, Alejandro
Camarero, Cristóbal
Martínez, Carmen
Beivide, Ramón
Distributed, Parallel, and Cluster Computing
Hardware Architecture
High-radix, low-diameter networks like HyperX and Dragonfly use a Full-mesh core, and rely on multiple virtual channels (VCs) to avoid packet deadlocks in adaptive routing. However, VCs introduce significant overhead in the switch in terms of area, power, and design complexity, limiting the switch scalability. This paper starts by revisiting VC-less routing through link ordering schemes in Full-mesh networks, which offer implementation simplicity but suffer from performance degradation under adversarial traffic. Thus, to overcome these challenges, we propose TERA (Topology-Embedded Routing Algorithm), a novel routing algorithm which employs an embedded physical subnetwork to provide deadlock-free non-minimal paths without using VCs. In a Full-mesh network, TERA outperforms link ordering routing algorithms by 80% when dealing with adversarial traffic, and up to 100% in application kernels. Furthermore, compared to other VC-based approaches, it reduces buffer requirements by 50%, while maintaining comparable latency and throughput. Lastly, early results from a 2D-HyperX evaluation show that TERA outperforms state-of-the-art algorithms that use the same number of VCs, achieving performance improvements of up to 32%.
title Deadlock-free routing for Full-mesh networks without using Virtual Channels
topic Distributed, Parallel, and Cluster Computing
Hardware Architecture
url https://arxiv.org/abs/2510.14730