From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Wang, Erwei, Bayliss, Samuel, Bisca, Andra, Blair, Zachary, Chowdhary, Sangeeta, Denolf, Kristof, Fifield, Jeff, Freiberger, Brandon, Hunhoff, Erika, James-Roxby, Phil, Lo, Jack, Melber, Joseph, Neuendorffer, Stephen, Richter, Eddie, Rosti, Andre, Setoain, Javier, Singh, Gagandeep, Taka, Endri, Vasireddy, Pranathi, Yu, Zhewen, Zhang, Niansong, Zhuang, Jinming
Format:	Preprint
Published:	2025
Subjects:	Computation and Language Hardware Architecture Machine Learning
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Be the first to leave a comment!

Similar Items