Unveiling Retention Loss Mechanism in FeFETs with Gate-side Interlayer by Decoupling Trapped Charges and Ferroelectric Polarization
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arXiv
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| Autores principales: | , , , , , , , , , , , , |
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| Formato: | Preprint |
| Publicado: |
2025
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| _version_ | 1866908599026974720 |
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| author | Han, Runhao Hu, Tao Yang, Jia Dai, Saifei Ding, Yajing Bai, Mingkai Shao, Xianzhou Chai, Junshuai Xu, Hao Luo, Qing Wang, Wenwu Ye, Tianchun Wang, Xiaolei |
| author_facet | Han, Runhao Hu, Tao Yang, Jia Dai, Saifei Ding, Yajing Bai, Mingkai Shao, Xianzhou Chai, Junshuai Xu, Hao Luo, Qing Wang, Wenwu Ye, Tianchun Wang, Xiaolei |
| contents | We propose a direct experimental extraction technique for trapped charges and quantitative energy band diagrams in the FeFETs with metal-insulator-ferroelectric-insulator-semiconductor (MIFIS) structure, derived from the physical relationship between Vth and gate-side interlayer (G.IL) thickness. By decoupling trapped charges and ferroelectric polarization, we reveal that: (i) The gateinjected charges and channel-injected charges are excessive and maintain consistent ratios to ferroelectric polarization (~170% and ~130%, respectively). (ii) Retention loss originates from the detrapping of gate-injected charges rather than ferroelectric depolarization. (iii) As the G.IL thickens, the gate-injected charge de-trapping path transforms from gate-side to channel-side. To address the retention loss, careful material design, optimization, and bandgap engineering in the MIFIS structure are crucial. This work advances the understanding of high retention strategies for MIFIS-FeFETs in 3D FE NAND. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2510_15275 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Unveiling Retention Loss Mechanism in FeFETs with Gate-side Interlayer by Decoupling Trapped Charges and Ferroelectric Polarization Han, Runhao Hu, Tao Yang, Jia Dai, Saifei Ding, Yajing Bai, Mingkai Shao, Xianzhou Chai, Junshuai Xu, Hao Luo, Qing Wang, Wenwu Ye, Tianchun Wang, Xiaolei Applied Physics We propose a direct experimental extraction technique for trapped charges and quantitative energy band diagrams in the FeFETs with metal-insulator-ferroelectric-insulator-semiconductor (MIFIS) structure, derived from the physical relationship between Vth and gate-side interlayer (G.IL) thickness. By decoupling trapped charges and ferroelectric polarization, we reveal that: (i) The gateinjected charges and channel-injected charges are excessive and maintain consistent ratios to ferroelectric polarization (~170% and ~130%, respectively). (ii) Retention loss originates from the detrapping of gate-injected charges rather than ferroelectric depolarization. (iii) As the G.IL thickens, the gate-injected charge de-trapping path transforms from gate-side to channel-side. To address the retention loss, careful material design, optimization, and bandgap engineering in the MIFIS structure are crucial. This work advances the understanding of high retention strategies for MIFIS-FeFETs in 3D FE NAND. |
| title | Unveiling Retention Loss Mechanism in FeFETs with Gate-side Interlayer by Decoupling Trapped Charges and Ferroelectric Polarization |
| topic | Applied Physics |
| url | https://arxiv.org/abs/2510.15275 |