Generalized Methodology for Determining Numerical Features of Hardware Floating-Point Matrix Multipliers: Part I
Fuente:
arXiv
Saved in:
| Main Authors: | Khattak, Faizan A, Mikaitis, Mantas |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Accurate Models of NVIDIA Tensor Cores
by: Khattak, Faizan A., et al.
Published: (2025)
by: Khattak, Faizan A., et al.
Published: (2025)
MATLAB Simulator of Level-Index Arithmetic
by: Mikaitis, Mantas
Published: (2024)
by: Mikaitis, Mantas
Published: (2024)
Inexactness and Correction of Floating-Point Reciprocal, Division and Square Root
by: Dutton, Lucas M., et al.
Published: (2024)
by: Dutton, Lucas M., et al.
Published: (2024)
A Hybrid Residue Floating Numerical Architecture for High Precision Arithmetic on FPGAs
by: Darvishi, Mostafa
Published: (2025)
by: Darvishi, Mostafa
Published: (2025)
Hardware-Accelerated Algorithm for Complex Function Roots Density Graph Plotting
by: Tang, Ruibai, et al.
Published: (2025)
by: Tang, Ruibai, et al.
Published: (2025)
SARIS: Accelerating Stencil Computations on Energy-Efficient RISC-V Compute Clusters with Indirect Stream Registers
by: Scheffler, Paul, et al.
Published: (2024)
by: Scheffler, Paul, et al.
Published: (2024)
Floating-Point Multiply-Add with Approximate Normalization for Low-Cost Matrix Engines
by: Alexandridis, Kosmas, et al.
Published: (2024)
by: Alexandridis, Kosmas, et al.
Published: (2024)
DGEMM without FP64 Arithmetic - Using FP64 Emulation and FP8 Tensor Cores with Ozaki Scheme
by: Mukunoki, Daichi
Published: (2025)
by: Mukunoki, Daichi
Published: (2025)
Mixed-precision finite element kernels and assembly: Rounding error analysis and hardware acceleration
by: Croci, M., et al.
Published: (2024)
by: Croci, M., et al.
Published: (2024)
LeGend: A Data-Driven Framework for Lemma Generation in Hardware Model Checking
by: Miao, Mingkai, et al.
Published: (2026)
by: Miao, Mingkai, et al.
Published: (2026)
EquivFusion: Unifying Hardware Equivalence Checking from Algorithms to Netlists via MLIR
by: Zhu, Jiaying, et al.
Published: (2026)
by: Zhu, Jiaying, et al.
Published: (2026)
C2HLSC: Leveraging Large Language Models to Bridge the Software-to-Hardware Design Gap
by: Collini, Luca, et al.
Published: (2024)
by: Collini, Luca, et al.
Published: (2024)
An Open-Source Framework for Efficient Numerically-Tailored Computations
by: Ledoux, Louis, et al.
Published: (2024)
by: Ledoux, Louis, et al.
Published: (2024)
The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages
by: Schreiner, Johannes, et al.
Published: (2024)
by: Schreiner, Johannes, et al.
Published: (2024)
KernelCraft: Benchmarking for Agentic Close-to-Metal Kernel Generation on Emerging Hardware
by: Nie, Jiayi, et al.
Published: (2026)
by: Nie, Jiayi, et al.
Published: (2026)
H-FA: A Hybrid Floating-Point and Logarithmic Approach to Hardware Accelerated FlashAttention
by: Alexandridis, Kosmas, et al.
Published: (2025)
by: Alexandridis, Kosmas, et al.
Published: (2025)
Toward Capturing Genetic Epistasis From Multivariate Genome-Wide Association Studies Using Mixed-Precision Kernel Ridge Regression
by: Ltaief, Hatem, et al.
Published: (2024)
by: Ltaief, Hatem, et al.
Published: (2024)
Evaluation of POSIT Arithmetic with Accelerators
by: Nakasato, Naohito, et al.
Published: (2024)
by: Nakasato, Naohito, et al.
Published: (2024)
Fast and energy-efficient derivatives risk analysis: Streaming option Greeks on Xilinx and Intel FPGAs
by: Klaisoongnoen, Mark, et al.
Published: (2022)
by: Klaisoongnoen, Mark, et al.
Published: (2022)
Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis
by: Gai, Jiahao, et al.
Published: (2025)
by: Gai, Jiahao, et al.
Published: (2025)
DRCY: Agentic Hardware Design Reviews
by: Dumont, Kyle, et al.
Published: (2026)
by: Dumont, Kyle, et al.
Published: (2026)
Accuracy of Mathematical Functions in Julia
by: Mikaitis, Mantas, et al.
Published: (2025)
by: Mikaitis, Mantas, et al.
Published: (2025)
Closing the Gap Between Float and Posit Hardware Efficiency
by: Jonnalagadda, Aditya Anirudh, et al.
Published: (2026)
by: Jonnalagadda, Aditya Anirudh, et al.
Published: (2026)
FuzzWiz -- Fuzzing Framework for Efficient Hardware Coverage
by: Gadde, Deepak Narayan, et al.
Published: (2024)
by: Gadde, Deepak Narayan, et al.
Published: (2024)
Fast Generation of Custom Floating-Point Spatial Filters on FPGAs
by: Campos, Nelson, et al.
Published: (2024)
by: Campos, Nelson, et al.
Published: (2024)
Hardware.jl - An MLIR-based Julia HLS Flow (Work in Progress)
by: Short, Benedict, et al.
Published: (2025)
by: Short, Benedict, et al.
Published: (2025)
FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
by: Shih, Yu-An, et al.
Published: (2025)
by: Shih, Yu-An, et al.
Published: (2025)
A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers
by: Xu, Zhihao, et al.
Published: (2024)
by: Xu, Zhihao, et al.
Published: (2024)
TimeFloats: Train-in-Memory with Time-Domain Floating-Point Scalar Products
by: Hashem, Maeesha Binte, et al.
Published: (2024)
by: Hashem, Maeesha Binte, et al.
Published: (2024)
Analysis of Floating-Point Matrix Multiplication Computed via Integer Arithmetic
by: Abdelfattah, Ahmad, et al.
Published: (2025)
by: Abdelfattah, Ahmad, et al.
Published: (2025)
AutoINV: Automated Invariant Generation Framework for Formal Verification on High-Level Synthesis Designs
by: Zhou, Xiaofeng, et al.
Published: (2026)
by: Zhou, Xiaofeng, et al.
Published: (2026)
ChiseLLM: Unleashing the Power of Reasoning LLMs for Chisel Agile Hardware Development
by: Wang, Bowei, et al.
Published: (2025)
by: Wang, Bowei, et al.
Published: (2025)
RTLRewriter: Methodologies for Large Models aided RTL Code Optimization
by: Yao, Xufeng, et al.
Published: (2024)
by: Yao, Xufeng, et al.
Published: (2024)
Hardware-Efficient CNNs: Interleaved Approximate FP32 Multipliers for Kernel Computation
by: Gowda, Bindu G, et al.
Published: (2025)
by: Gowda, Bindu G, et al.
Published: (2025)
Hardware-Efficient Accurate 4-bit Multiplier for Xilinx 7 Series FPGAs
by: Kida, Misaki, et al.
Published: (2025)
by: Kida, Misaki, et al.
Published: (2025)
Is Agentic AI Ready for Real-World Hardware Engineering? A Deep Dive with Phoenix-bench
by: Zou, Qingyun, et al.
Published: (2026)
by: Zou, Qingyun, et al.
Published: (2026)
A Semi-Formal Verification Methodology for Efficient Configuration Coverage of Highly Configurable Digital Designs
by: Kumar, Aman, et al.
Published: (2024)
by: Kumar, Aman, et al.
Published: (2024)
FTTN: Feature-Targeted Testing for Numerical Properties of NVIDIA & AMD Matrix Accelerators
by: Li, Xinyi, et al.
Published: (2024)
by: Li, Xinyi, et al.
Published: (2024)
HW/SW Co-design of a PCM/PWM converter: a System Level Approach based in the SpecC Methodology
by: Petrini, Daniel G. P., et al.
Published: (2025)
by: Petrini, Daniel G. P., et al.
Published: (2025)
Online Alignment and Addition in Multi-Term Floating-Point Adders
by: Alexandridis, Kosmas, et al.
Published: (2024)
by: Alexandridis, Kosmas, et al.
Published: (2024)
Similar Items
-
Accurate Models of NVIDIA Tensor Cores
by: Khattak, Faizan A., et al.
Published: (2025) -
MATLAB Simulator of Level-Index Arithmetic
by: Mikaitis, Mantas
Published: (2024) -
Inexactness and Correction of Floating-Point Reciprocal, Division and Square Root
by: Dutton, Lucas M., et al.
Published: (2024) -
A Hybrid Residue Floating Numerical Architecture for High Precision Arithmetic on FPGAs
by: Darvishi, Mostafa
Published: (2025) -
Hardware-Accelerated Algorithm for Complex Function Roots Density Graph Plotting
by: Tang, Ruibai, et al.
Published: (2025)