Limited Read-Write/Set Hardware Transactional Memory without modifying the ISA or the Coherence Protocol

Fuente: arXiv

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Bibliographic Details
Main Author:	Kafousis, Konstantinos
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2510.15888