Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project
Fuente:
arXiv
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , , , , , |
|---|---|
| Format: | Preprint |
| Veröffentlicht: |
2025
|
| Schlagworte: | |
| Online-Zugang: | |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| _version_ | 1866917026434383872 |
|---|---|
| author | Agosta, Giovanni Cherubin, Stefano Christ, Derek Conti, Francesco Djupdal, Asbjørn Jung, Matthias Keramidas, Georgios Passerone, Roberto Rech, Paolo Ricci, Elisa Velha, Philippe Vella, Flavio Yildirim, Kasim Sinan Wilbert, Nils |
| author_facet | Agosta, Giovanni Cherubin, Stefano Christ, Derek Conti, Francesco Djupdal, Asbjørn Jung, Matthias Keramidas, Georgios Passerone, Roberto Rech, Paolo Ricci, Elisa Velha, Philippe Vella, Flavio Yildirim, Kasim Sinan Wilbert, Nils |
| contents | ARCHYTAS aims to design and evaluate non-conventional hardware accelerators, in particular, optoelectronic, volatile and non-volatile processing-in-memory, and neuromorphic, to tackle the power, efficiency, and scalability bottlenecks of AI with an emphasis on defense use cases (e.g., autonomous vehicles, surveillance drones, maritime and space platforms). In this paper, we present the system architecture and software stack that ARCHYTAS will develop to integrate and support those accelerators, as well as the simulation software needed for early prototyping of the full system and its components. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2510_16487 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project Agosta, Giovanni Cherubin, Stefano Christ, Derek Conti, Francesco Djupdal, Asbjørn Jung, Matthias Keramidas, Georgios Passerone, Roberto Rech, Paolo Ricci, Elisa Velha, Philippe Vella, Flavio Yildirim, Kasim Sinan Wilbert, Nils Hardware Architecture ARCHYTAS aims to design and evaluate non-conventional hardware accelerators, in particular, optoelectronic, volatile and non-volatile processing-in-memory, and neuromorphic, to tackle the power, efficiency, and scalability bottlenecks of AI with an emphasis on defense use cases (e.g., autonomous vehicles, surveillance drones, maritime and space platforms). In this paper, we present the system architecture and software stack that ARCHYTAS will develop to integrate and support those accelerators, as well as the simulation software needed for early prototyping of the full system and its components. |
| title | Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2510.16487 |