Cover Image

Choreographer: A Full-System Framework for Fine-Grained Tasks in Cache Hierarchies

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Nguyen, Hoa, Maidee, Pongstorn, Lowe-Power, Jason, Kaviani, Alireza
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Pickle Prefetcher: Programmable and Scalable Last-Level Cache Prefetcher
by: Nguyen, Hoa, et al.
Published: (2025)

Arcalis: Accelerating Remote Procedure Calls Using a Lightweight Near-Cache Solution
by: Umeike, Johnson, et al.
Published: (2026)

Potential and Limitation of High-Frequency Cores and Caches
by: Pai, Kunal, et al.
Published: (2024)

Portable Targeted Sampling Framework Using LLVM
by: Qiu, Zhantong, et al.
Published: (2025)

CXL-ClusterSim: Modeling CXL-based Disaggregated Memory Cluster for Pooling and Sharing using gem5 and SST
by: Goswami, Kaustav, et al.
Published: (2026)

TDRAM: Tag-enhanced DRAM for Efficient Caching
by: Babaie, Maryam, et al.
Published: (2024)

HammerSim: A System-Level Tool to Model RowHammer
by: Goswami, Kaustav, et al.
Published: (2026)

Toward Reproducible and Standardized Computer Architecture Simulation with gem5
by: Pai, Kunal, et al.
Published: (2025)

A Full-System Simulation Framework for CXL-Based SSD Memory System
by: Wang, Yaohui, et al.
Published: (2025)

A Prototype-Based Framework to Design Scalable Heterogeneous SoCs with Fine-Grained DFS
by: Montanaro, Gabriele, et al.
Published: (2024)

Sim-FA: A GPGPU Simulator Framework for Fine-Grained FlashAttention Pipeline Analysis
by: Zhou, Zhongchun, et al.
Published: (2026)

VolTune: A Fine-Grained Runtime Voltage Control Architecture for FPGA Systems
by: Ahmed, Akram Ben, et al.
Published: (2026)

Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing
by: Khadem, Alireza, et al.
Published: (2025)

Space-Control: Process-Level Isolation for Sharing CXL-based Disaggregated Memory
by: Goswami, Kaustav, et al.
Published: (2026)

Fletch: File-System Metadata Caching in Programmable Switches
by: Liu, Qingxiu, et al.
Published: (2025)

Improving the Representativeness of Simulation Intervals for the Cache Memory System
by: Bueno, Nicolas, et al.
Published: (2024)

Cohet: A CXL-Driven Coherent Heterogeneous Computing Framework with Hardware-Calibrated Full-System Simulation
by: Wang, Yanjing, et al.
Published: (2025)

DeepAssert: An LLM-Aided Verification Framework with Fine-Grained Assertion Generation for Modules with Extracted Module Specifications
by: Wang, Yonghao, et al.
Published: (2025)

LFOC+: A Fair OS-level Cache-Clustering Policy for Commodity Multicore Systems
by: Saez, Juan Carlos, et al.
Published: (2024)

The Open-Source BlackParrot-BedRock Cache Coherence System
by: Wyse, Mark Unruh
Published: (2025)

Memory Hierarchy Design for Caching Middleware in the Age of NVM
by: Ghandeharizadeh, Shahram, et al.
Published: (2025)

Rhea: a Framework for Fast Design and Validation of RTL Cache-Coherent Memory Subsystems
by: Zoni, Davide, et al.
Published: (2025)

Squire: A General-Purpose Accelerator to Exploit Fine-Grain Parallelism on Dependency-Bound Kernels
by: Langarita, Rubén, et al.
Published: (2025)

Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture
by: Olgun, Ataberk, et al.
Published: (2022)

Piccolo: Large-Scale Graph Processing with Fine-Grained In-Memory Scatter-Gather
by: Shin, Changmin, et al.
Published: (2025)

Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision
by: Dai, Xilai, et al.
Published: (2024)

Per-Bank Bandwidth Regulation of Shared Last-Level Cache for Real-Time Systems
by: Sullivan, Connor, et al.
Published: (2024)

FLICKER: A Fine-Grained Contribution-Aware Accelerator for Real-Time 3D Gaussian Splatting
by: Ou, Wenhui, et al.
Published: (2026)

ReDas: A Lightweight Architecture for Supporting Fine-Grained Reshaping and Multiple Dataflows on Systolic Array
by: Han, Meng, et al.
Published: (2023)

Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration
by: Liu, Yongxiang, et al.
Published: (2025)

Fine-Grained Fusion: The Missing Piece in Area-Efficient State Space Model Acceleration
by: Geens, Robin, et al.
Published: (2025)

DCI: A Coordinated Allocation and Filling Workload-Aware Dual-Cache Allocation GNN Inference Acceleration System
by: Luo, Yi, et al.
Published: (2025)

Spec2Cov: An Agentic Framework for Code Coverage Closure of Digital Hardware Designs
by: Lowe, Sean, et al.
Published: (2026)

Full System Architecture Modeling for Wearable Egocentric Contextual AI
by: Lee, Vincent T., et al.
Published: (2025)

Multiport Support for Vortex OpenGPU Memory Hierarchy
by: Shin, Injae, et al.
Published: (2025)

Cosmos: A CXL-Based Full In-Memory System for Approximate Nearest Neighbor Search
by: Ko, Seoyoung, et al.
Published: (2025)

Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization
by: Fang, Wenji, et al.
Published: (2024)

CMD: A Cache-assisted GPU Memory Deduplication Architecture
by: Zhao, Wei, et al.
Published: (2024)

A Near-Cache Architectural Framework for Cryptographic Computing
by: Zhang, Jingyao, et al.
Published: (2025)

LEAP: LLM Inference on Scalable PIM-NoC Architecture with Balanced Dataflow and Fine-Grained Parallelism
by: Wang, Yimin, et al.
Published: (2025)