Gate Dielectric Engineering with an Ultrathin Silicon-oxide Interfacial Dipole Layer for Low-Leakage Oxide-Semiconductor Memories

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Athena, Fabia F., Hartanto, Jonathan, Passlack, Matthias, Evans, Jack C., Qin, Jimmy, Dede, Didem, Jana, Koustav, Liu, Shuhan, Peña, Tara, Pop, Eric, Pitner, Greg, Radu, Iuliana P., McIntyre, Paul C., Wong, H. -S. Philip
Format:	Preprint
Published:	2025
Subjects:	Materials Science Mesoscale and Nanoscale Physics Applied Physics
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Internet

https://arxiv.org/abs/2511.00786