A High-Throughput Spiking Neural Network Processor Enabling Synaptic Delay Emulation
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arXiv
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| Main Authors: | , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866914140085288960 |
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| author | Chen, Faquan Tian, Qingyang Wu, Ziren Ying, Rendong Wen, Fei Liu, Peilin |
| author_facet | Chen, Faquan Tian, Qingyang Wu, Ziren Ying, Rendong Wen, Fei Liu, Peilin |
| contents | Synaptic delay has attracted significant attention in neural network dynamics for integrating and processing complex spatiotemporal information. This paper introduces a high-throughput Spiking Neural Network (SNN) processor that supports synaptic delay-based emulation for edge applications. The processor leverages a multicore pipelined architecture with parallel compute engines, capable of real-time processing of the computational load associated with synaptic delays. We develop a SoC prototype of the proposed processor on PYNQ Z2 FPGA platform and evaluate its performance using the Spiking Heidelberg Digits (SHD) benchmark for low-power keyword spotting tasks. The processor achieves 93.4% accuracy in deployment and an average throughput of 104 samples/sec at a typical operating frequency of 125 MHz and 282 mW power consumption. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2511_01158 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | A High-Throughput Spiking Neural Network Processor Enabling Synaptic Delay Emulation Chen, Faquan Tian, Qingyang Wu, Ziren Ying, Rendong Wen, Fei Liu, Peilin Neural and Evolutionary Computing Artificial Intelligence Synaptic delay has attracted significant attention in neural network dynamics for integrating and processing complex spatiotemporal information. This paper introduces a high-throughput Spiking Neural Network (SNN) processor that supports synaptic delay-based emulation for edge applications. The processor leverages a multicore pipelined architecture with parallel compute engines, capable of real-time processing of the computational load associated with synaptic delays. We develop a SoC prototype of the proposed processor on PYNQ Z2 FPGA platform and evaluate its performance using the Spiking Heidelberg Digits (SHD) benchmark for low-power keyword spotting tasks. The processor achieves 93.4% accuracy in deployment and an average throughput of 104 samples/sec at a typical operating frequency of 125 MHz and 282 mW power consumption. |
| title | A High-Throughput Spiking Neural Network Processor Enabling Synaptic Delay Emulation |
| topic | Neural and Evolutionary Computing Artificial Intelligence |
| url | https://arxiv.org/abs/2511.01158 |