Saved in:
Bibliographic Details
Main Authors: Ni, Liwei, Zhang, Jiaxi, Zheng, Shenggen, Liu, Junfeng, Meng, Xingyu, Xie, Biwei, Li, Xingquan, Li, Huawei
Format: Preprint
Published: 2025
Subjects:
Online Access:https://arxiv.org/abs/2511.02196
Tags: Add Tag
No Tags, Be the first to tag this record!
_version_ 1866909885833150464
author Ni, Liwei
Zhang, Jiaxi
Zheng, Shenggen
Liu, Junfeng
Meng, Xingyu
Xie, Biwei
Li, Xingquan
Li, Huawei
author_facet Ni, Liwei
Zhang, Jiaxi
Zheng, Shenggen
Liu, Junfeng
Meng, Xingyu
Xie, Biwei
Li, Xingquan
Li, Huawei
contents Boolean equivalence allows Boolean networks with identical functionality to exhibit diverse graph structures. This gives more room for exploration in logic optimization, while also posing a challenge for tasks involving consistency between Boolean networks. To tackle this challenge, we introduce BoolSkeleton, a novel Boolean network skeletonization method that improves the consistency and reliability of design-specific evaluations. BoolSkeleton comprises two key steps: preprocessing and reduction. In preprocessing, the Boolean network is transformed into a defined Boolean dependency graph, where nodes are assigned the functionality-related status. Next, the homogeneous and heterogeneous patterns are defined for the node-level pattern reduction step. Heterogeneous patterns are preserved to maintain critical functionality-related dependencies, while homogeneous patterns can be reduced. Parameter K of the pattern further constrains the fanin size of these patterns, enabling fine-tuned control over the granularity of graph reduction. To validate BoolSkeleton's effectiveness, we conducted four analysis/downstream tasks around the Boolean network: compression analysis, classification, critical path analysis, and timing prediction, demonstrating its robustness across diverse scenarios. Furthermore, it improves above 55% in the average accuracy compared to the original Boolean network for the timing prediction task. These experiments underscore the potential of BoolSkeleton to enhance design consistency in logic synthesis.
format Preprint
id arxiv_https___arxiv_org_abs_2511_02196
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction
Ni, Liwei
Zhang, Jiaxi
Zheng, Shenggen
Liu, Junfeng
Meng, Xingyu
Xie, Biwei
Li, Xingquan
Li, Huawei
Hardware Architecture
Artificial Intelligence
Boolean equivalence allows Boolean networks with identical functionality to exhibit diverse graph structures. This gives more room for exploration in logic optimization, while also posing a challenge for tasks involving consistency between Boolean networks. To tackle this challenge, we introduce BoolSkeleton, a novel Boolean network skeletonization method that improves the consistency and reliability of design-specific evaluations. BoolSkeleton comprises two key steps: preprocessing and reduction. In preprocessing, the Boolean network is transformed into a defined Boolean dependency graph, where nodes are assigned the functionality-related status. Next, the homogeneous and heterogeneous patterns are defined for the node-level pattern reduction step. Heterogeneous patterns are preserved to maintain critical functionality-related dependencies, while homogeneous patterns can be reduced. Parameter K of the pattern further constrains the fanin size of these patterns, enabling fine-tuned control over the granularity of graph reduction. To validate BoolSkeleton's effectiveness, we conducted four analysis/downstream tasks around the Boolean network: compression analysis, classification, critical path analysis, and timing prediction, demonstrating its robustness across diverse scenarios. Furthermore, it improves above 55% in the average accuracy compared to the original Boolean network for the timing prediction task. These experiments underscore the potential of BoolSkeleton to enhance design consistency in logic synthesis.
title BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction
topic Hardware Architecture
Artificial Intelligence
url https://arxiv.org/abs/2511.02196