DecodeX: Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms
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arXiv
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| Auteurs principaux: | , , , , , , |
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| Format: | Preprint |
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2025
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| _version_ | 1866908629477621760 |
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| author | Qi, Zhenzhou Yao, Yuncheng Li, Yiming Tung, Chung-Hsuan Zheng, Junyao Zhuo, Danyang Chen, Tingjun |
| author_facet | Qi, Zhenzhou Yao, Yuncheng Li, Yiming Tung, Chung-Hsuan Zheng, Junyao Zhuo, Danyang Chen, Tingjun |
| contents | Emerging virtualized radio access networks (vRANs) demand flexible and efficient baseband processing across heterogeneous compute substrates. In this paper, we present DecodeX, a unified benchmarking framework for evaluating low-density parity-check (LDPC) decoding acceleration across different hardware platforms. DecodeX integrates a comprehensive suite of LDPC decoder implementations, including kernels, APIs, and test vectors for CPUs (FlexRAN), GPUs (Aerial and Sionna-RK), and ASIC (ACC100), and can be readily extended to additional architectures and configurations. Using DecodeX, we systematically characterize how different platforms orchestrate computation-from threading and memory management to data movement and accelerator offload-and quantify the resulting decoding latency under varying Physical layer parameters. Our observations reveal distinct trade-offs in parallel efficiency and offload overhead, showing that accelerator gains strongly depend on data-movement and workload granularity. Building on these insights, we discuss how cross-platform benchmarking can inform adaptive scheduling and co-design for future heterogeneous vRANs, enabling scalable and energy-efficient baseband processing for NextG wireless systems. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2511_02952 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | DecodeX: Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms Qi, Zhenzhou Yao, Yuncheng Li, Yiming Tung, Chung-Hsuan Zheng, Junyao Zhuo, Danyang Chen, Tingjun Networking and Internet Architecture Emerging virtualized radio access networks (vRANs) demand flexible and efficient baseband processing across heterogeneous compute substrates. In this paper, we present DecodeX, a unified benchmarking framework for evaluating low-density parity-check (LDPC) decoding acceleration across different hardware platforms. DecodeX integrates a comprehensive suite of LDPC decoder implementations, including kernels, APIs, and test vectors for CPUs (FlexRAN), GPUs (Aerial and Sionna-RK), and ASIC (ACC100), and can be readily extended to additional architectures and configurations. Using DecodeX, we systematically characterize how different platforms orchestrate computation-from threading and memory management to data movement and accelerator offload-and quantify the resulting decoding latency under varying Physical layer parameters. Our observations reveal distinct trade-offs in parallel efficiency and offload overhead, showing that accelerator gains strongly depend on data-movement and workload granularity. Building on these insights, we discuss how cross-platform benchmarking can inform adaptive scheduling and co-design for future heterogeneous vRANs, enabling scalable and energy-efficient baseband processing for NextG wireless systems. |
| title | DecodeX: Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms |
| topic | Networking and Internet Architecture |
| url | https://arxiv.org/abs/2511.02952 |