Enregistré dans:
| Auteurs principaux: | , , , , , , , |
|---|---|
| Format: | Preprint |
| Publié: |
2025
|
| Sujets: | |
| Accès en ligne: | https://arxiv.org/abs/2511.04677 |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|
| _version_ | 1866915602769117184 |
|---|---|
| author | Tarraga-Moreno, Joaquin Barley, Daniel Munoz, Francisco J. Andujar Escudero-Sahuquillo, Jesus Froning, Holger Garcia, Pedro Javier Quiles, Francisco J. Duato, Jose |
| author_facet | Tarraga-Moreno, Joaquin Barley, Daniel Munoz, Francisco J. Andujar Escudero-Sahuquillo, Jesus Froning, Holger Garcia, Pedro Javier Quiles, Francisco J. Duato, Jose |
| contents | The rapid growth of data-intensive applications such as generative AI, scientific simulations, and large-scale analytics is driving modern supercomputers and data centers toward increasingly heterogeneous and tightly integrated architectures. These systems combine powerful CPUs and accelerators with emerging high-bandwidth memory and storage technologies to reduce data movement and improve computational efficiency. However, as the number of accelerators per node increases, communication bottlenecks emerge both within and between nodes, particularly when network resources are shared among heterogeneous components. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2511_04677 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Scalable and Efficient Intra- and Inter-node Interconnection Networks for Post-Exascale Supercomputers and Data centers Tarraga-Moreno, Joaquin Barley, Daniel Munoz, Francisco J. Andujar Escudero-Sahuquillo, Jesus Froning, Holger Garcia, Pedro Javier Quiles, Francisco J. Duato, Jose Hardware Architecture The rapid growth of data-intensive applications such as generative AI, scientific simulations, and large-scale analytics is driving modern supercomputers and data centers toward increasingly heterogeneous and tightly integrated architectures. These systems combine powerful CPUs and accelerators with emerging high-bandwidth memory and storage technologies to reduce data movement and improve computational efficiency. However, as the number of accelerators per node increases, communication bottlenecks emerge both within and between nodes, particularly when network resources are shared among heterogeneous components. |
| title | Scalable and Efficient Intra- and Inter-node Interconnection Networks for Post-Exascale Supercomputers and Data centers |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2511.04677 |