Cover Image

ZeroSim: Zero-Shot Analog Circuit Evaluation with Unified Transformer Embeddings

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Yang, Xiaomeng, Gao, Jian, Wang, Yanzhi, Zhang, Xuan
Format:	Preprint
Published:	2025
Subjects:	Machine Learning Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies
by: Gao, Jian, et al.
Published: (2025)

AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experience
by: Wang, Zining, et al.
Published: (2025)

ShortCircuit: AlphaZero-Driven Circuit Design
by: Tsaras, Dimitrios, et al.
Published: (2024)

Graph Neural Networks Based Analog Circuit Link Prediction
by: Pan, Guanyuan, et al.
Published: (2025)

Circuit Transformer: A Transformer That Preserves Logical Equivalence
by: Li, Xihan, et al.
Published: (2024)

LLM-based AI Agent for Sizing of Analog and Mixed Signal Circuit
by: Liu, Chang, et al.
Published: (2025)

EEsizer: LLM-Based AI Agent for Sizing of Analog and Mixed Signal Circuit
by: Liu, Chang, et al.
Published: (2025)

An Analog and Digital Hybrid Attention Accelerator for Transformers with Charge-based In-memory Computing
by: Moradifirouzabadi, Ashkan, et al.
Published: (2024)

ARTEMIS: A Mixed Analog-Stochastic In-DRAM Accelerator for Transformer Neural Networks
by: Afifi, Salma, et al.
Published: (2024)

PowerGenie: Analytically-Guided Evolutionary Discovery of Superior Reconfigurable Power Converters
by: Gao, Jian, et al.
Published: (2026)

LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits
by: Chang, Chen-Chia, et al.
Published: (2024)

AnalogNAS-Bench: A NAS Benchmark for Analog In-Memory Computing
by: Bessalah, Aniss, et al.
Published: (2025)

RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization with Knowledge-infused Reinforcement Learning
by: Cao, Weidong, et al.
Published: (2024)

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC
by: Ribeiro, Lucas Grativol, et al.
Published: (2024)

Zero-Space Cost Fault Tolerance for Transformer-based Language Models on ReRAM
by: Li, Bingbing, et al.
Published: (2024)

Breaking the Tuning Barrier: Zero-Hyperparameters Yield Multi-Corner Analysis Via Learned Priors
by: Xing, Wei W., et al.
Published: (2026)

Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insights
by: Mehradfar, Asal, et al.
Published: (2025)

LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation
by: Chang, Chen-Chia, et al.
Published: (2025)

CircuitVAE: Efficient and Scalable Latent Circuit Optimization
by: Song, Jialin, et al.
Published: (2024)

A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA
by: Fang, Wenji, et al.
Published: (2025)

Kernel Approximation using Analog In-Memory Computing
by: Büchel, Julian, et al.
Published: (2024)

PICBench: Benchmarking LLMs for Photonic Integrated Circuits Design
by: Wu, Yuchao, et al.
Published: (2025)

Analog Bayesian neural networks are insensitive to the shape of the weight distribution
by: Patel, Ravi G., et al.
Published: (2025)

AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Design
by: Mehradfar, Asal, et al.
Published: (2024)

GTAC: A Generative Transformer for Approximate Circuits
by: Wang, Jingxin, et al.
Published: (2025)

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
by: Li, Jintao, et al.
Published: (2024)

GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identification
by: Pham, Phuoc, et al.
Published: (2025)

Hardware-Software Co-Design of Scalable, Energy-Efficient Analog Recurrent Computations
by: Fyon, Arthur, et al.
Published: (2026)

DE-HNN: An effective neural model for Circuit Netlist representation
by: Luo, Zhishang, et al.
Published: (2024)

AnaFlow: Agentic LLM-based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing
by: Ahmadzadeh, Mohsen, et al.
Published: (2025)

RACE-IT: A Reconfigurable Analog Computing Engine for In-Memory Transformer Acceleration
by: Zhao, Lei, et al.
Published: (2023)

Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
by: Deng, Chenhui, et al.
Published: (2024)

BDD2Seq: Enabling Scalable Reversible-Circuit Synthesis via Graph-to-Sequence Learning
by: Miao, Mingkai, et al.
Published: (2025)

GraCo -- A Graph Composer for Integrated Circuits
by: Uhlich, Stefan, et al.
Published: (2024)

The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks
by: Yang, Chenghao, et al.
Published: (2022)

NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealities
by: Read, James, et al.
Published: (2025)

AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning
by: Li, Chongxiao, et al.
Published: (2026)

GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment
by: Fang, Wenji, et al.
Published: (2025)

DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations
by: Khan, Sadaf, et al.
Published: (2024)

Computer Architecture's AlphaZero Moment: Automated Discovery in an Encircled World
by: Sankaralingam, Karthikeyan
Published: (2026)